ChibiOS Free Embedded RTOS

Hi Giovanni,
the F0 port of Chibios 3.0 does not cater for the two types of clock in this family of devices.

The demo you did for the F0 on the nucleo board was based on (STM32F070x6, STM32F070xB and STM32F030xC).

The referance manual on page 90/91 shows that the F0 has two different clock schemas.

Thus at the moment PLL is not usable on a F030x8 part.


Is there a fix for this ?

Hi,

Not yet, there is no board from ST for those parts so I haven't really tested it.

Giovanni

Giovanni wrote:Hi,

Not yet, there is no board from ST for those parts so I haven't really tested it.

Giovanni

So you have something but its not tested ?
If so would you like me to test it on my custom hardware ?

Please go ahead.

The HAL is a purely open source project, don't expect everything to be tested or functional outside the provided demos for the tested devices.

The RTOSes are a different matter.

Giovanni

Giovanni wrote:Please go ahead.

The HAL is a purely open source project, don't expect everything to be tested or functional outside the provided demos for the tested devices.

The RTOSes are a different matter.

Giovanni

Just tested 3.0.2 and the PLL will not work for these devices.

This might save me starting a new topic. I was about to post that my new homebrew board with a STM32F030x4 wasn't behaving. I too started with Chibi-3.0.2 and the demos/STM32/RT-STM32F030R8-NUCLEO/ project and modified it a bit to compile.

My main() currently just initializes os/hal and then while(1) { chThdSleepMilliseconds( 500 ); }

What I am seeing is that it enters the sleep, but never comes back out. If I break in the debugger at any point, it is stuck in port_wait_for_interrupt(). It seems my TIM3 timer is not generating interrupts so I figured this might be related to the OP missing PLL.

If so, how can I help?

There must be some differences in RCC or clock tree.

Probably it is something simple but I don't have any HW for a debug session.

Giovanni

Giovanni, I'd happily mail you one of my homebrew boards.

It is literally nothing more than a breakout to some 0.1" headers and a couple de-coupling caps, but it boots the part. As long as you have a breadboard, some jumpers, and another STM32 devkit to power it and use the SWIO interface, it is a viable solution. It's not pretty but it works, I didn't spend too much time on iteration 1 since I'm still trying to figure out whether I can use this part.

Let me know if this is appealing to you, and if so PM me an address and I can put one together today.

Giovanni wrote:There must be some differences in RCC or clock tree.

Probably it is something simple but I don't have any HW for a debug session.

Giovanni

This is correct, the F0's have two different clock trees, this can be seen on the reference manual page 90/91

http://www.st.com/st-web-ui/static/acti ... 091010.pdf

if the device is Clock tree (STM32F030x4, STM32F030x6 and STM32F030x8 devices)
then the HSI has a fixed divide by 2, then PLL Mull x 12 to get 48Mhz

if the device is Clock tree (STM32F070x6, STM32F070xB and STM32F030xC)
then the HSI is divide by a selectable PREDIV, then PLL Mull to get 48Mhz

I will assess and implement the changes however I will have to leave tests to you.

Giovanni