Chibi-3.0.3, and STM32F072 DISCO board. This is my first time dealing with the i2c-v2 driver, so I thought I'd give it a try.
I read the RM for my part and found the tables for I2C timings. Since my project has
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#define STM32_I2C1SW STM32_I2C1SW_HSIThe I2C freq should be 8MHz.
After looking that up in the table, and I wish to support 100kHz I2C mode, I ended up with:
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static const I2CConfig i2c_cfg_1 = {
STM32_TIMINGR_PRESC(0x01U) |
STM32_TIMINGR_SCLDEL(0x04U) | STM32_TIMINGR_SDADEL(0x02U) |
STM32_TIMINGR_SCLH(0x0fU) | STM32_TIMINGR_SCLL(0x13U),
0,
0
};
Sidenote, the example in testhal/STM32/STM32F37x/I2C that I have found using i2c-v2 driver is a bit confusing. The comment says one thing, then there is a I2C configuration which is commented out, and another replacing it, none of which seems to agree with the comment, or the manuals.
Anyway, I set up my two SDA/SCL pins as per the RM/Datasheet, and configure the device:
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palSetPadMode(GPIOB, 8, PAL_MODE_ALTERNATE(1) | PAL_STM32_OTYPE_OPENDRAIN );
palSetPadMode(GPIOB, 9, PAL_MODE_ALTERNATE(1) | PAL_STM32_OTYPE_OPENDRAIN );
i2cInit();
i2cStart( &I2CD1, &i2c_cfg_1 );
However, a subsequent call to i2cMasterTransmitTimeout() returns MSG_RESET. I'm not sure why, or how to proceed. I have all DBG defines enabled and nothing is causing an error/stack overflow that I can detect.
The I2C hardware works, as I began this project on a STM32L DISCOVERY, and am porting it to the F0. The only major differences are the I2C config/setup code. I can see on the scope that the SCL and SDA lines are attempting to communicate, but something must be different in the timing perhaps?