Code size optimziation.
Posted: Sat Jan 02, 2016 12:49 pm
Hi,
I have an application that is running out of flash. I'd rather not move to a bigger processor. (I have a sizeable batch of the smaller chips I like to eventually sell... )
Is there a good reason that functions in the .text segment are aligned to 16 bytes? My application is now almost 15 kbytes large, I need a 1k region for parameter storage, so I have only 15k available in my 16k device. Running at "72 bytes free" at last compile...
But looking for "what can I cut" in the mapfile: I have over 1200 bytes of "*fill*" in the text segment. Does aligning functions give a big performance increase?
That said...
On ARM everybody has loads of ".ld" files that end up being named individually in the makefile depending on the CPU being used. On AVR I just pass the name of the CPU to the compiler and all the rest is being taken care of. (on the other hand, maybe with AVR the linker doesn't throw a fit if you exceed the flash size.) Anyway, wouldn't it be nice/possible to modify the linker scripts with commandline arguments in such a way that we can eliminate most of the linker files?
So for example, in my current project I could use a 16k or a 32k chip. So I need to point to the two possible .ld files that are the same except for a single length=16k vs length=32k. However, as I've said before, THIS project can only use 15/16 or 31/32 of the 1k pages, as I need one page for the parameter storage. So now I'd have to create a custom linker-file for this project, while I much rather have a single parameter in my Makefile that says: max-flash-size=15k .
I have an application that is running out of flash. I'd rather not move to a bigger processor. (I have a sizeable batch of the smaller chips I like to eventually sell... )
Is there a good reason that functions in the .text segment are aligned to 16 bytes? My application is now almost 15 kbytes large, I need a 1k region for parameter storage, so I have only 15k available in my 16k device. Running at "72 bytes free" at last compile...
But looking for "what can I cut" in the mapfile: I have over 1200 bytes of "*fill*" in the text segment. Does aligning functions give a big performance increase?
That said...
On ARM everybody has loads of ".ld" files that end up being named individually in the makefile depending on the CPU being used. On AVR I just pass the name of the CPU to the compiler and all the rest is being taken care of. (on the other hand, maybe with AVR the linker doesn't throw a fit if you exceed the flash size.) Anyway, wouldn't it be nice/possible to modify the linker scripts with commandline arguments in such a way that we can eliminate most of the linker files?
So for example, in my current project I could use a 16k or a 32k chip. So I need to point to the two possible .ld files that are the same except for a single length=16k vs length=32k. However, as I've said before, THIS project can only use 15/16 or 31/32 of the 1k pages, as I need one page for the parameter storage. So now I'd have to create a custom linker-file for this project, while I much rather have a single parameter in my Makefile that says: max-flash-size=15k .