STM32F401: ADC Config,How I get a sampling freq ~100Hz)
Posted: Thu Jun 09, 2016 5:42 am
Hi everyone,
I'm working with nucleo STM32F401 board and ChibiOS 16.1.3
My question is : how do I configure my ADCConversionGroup to have in channel 0 a sampling frequency = ~100 HZ, I read that we have to set the ADC_SMPR2 register but we have only 3 bits, I mean 8 choices...
Maybe if I use the Timer 3 TRGO event (or another one) to trigger my convert but the number of simples have to be 1?
I was reading that:
11.3.2 ADC clock
The ADC features two clock schemes:
• Clock for the analog circuitry: ADCCLK
This clock is generated from the APB2 clock divided by a programmable prescaler that
allows the ADC to work at fPCLK2/2, /4, /6 or /8. Refer to the datasheets for the
maximum value of ADCCLK.
• Clock for the digital interface (used for registers read/write access)
This clock is equal to the APB2 clock. The digital interface clock can be
enabled/disabled individually for each ADC through the RCC APB2 peripheral clock
enable register (RCC_APB2ENR).
somebody has any idea ?
Thank you in advance for your help,
Raul
I'm working with nucleo STM32F401 board and ChibiOS 16.1.3
My question is : how do I configure my ADCConversionGroup to have in channel 0 a sampling frequency = ~100 HZ, I read that we have to set the ADC_SMPR2 register but we have only 3 bits, I mean 8 choices...
Maybe if I use the Timer 3 TRGO event (or another one) to trigger my convert but the number of simples have to be 1?
I was reading that:
11.3.2 ADC clock
The ADC features two clock schemes:
• Clock for the analog circuitry: ADCCLK
This clock is generated from the APB2 clock divided by a programmable prescaler that
allows the ADC to work at fPCLK2/2, /4, /6 or /8. Refer to the datasheets for the
maximum value of ADCCLK.
• Clock for the digital interface (used for registers read/write access)
This clock is equal to the APB2 clock. The digital interface clock can be
enabled/disabled individually for each ADC through the RCC APB2 peripheral clock
enable register (RCC_APB2ENR).
somebody has any idea ?
Thank you in advance for your help,
Raul