memcpy and cache on STM32F7
Posted: Tue Feb 28, 2017 10:24 am
AIUI memcpy() (and certain other functions) can be implemented in a platform-specific way to improve efficiency - perhaps using DMA. On the F7 that raises the issue of cache coherency. Is it reasonable to assume that if memcpy() uses DMA, cache coherency will be managed within the function? There's a modest performance hit to flushing/invalidating buffers, so I'd prefer not to do it unnecessarily.