ChibiOS Free Embedded RTOS

Hi,

I need a repetitive timer, with variable interval. I want the next interval be set in the timer callback. I.e. when the timer fires, I decide when to fire it next.

I implemented it using ChibiOS GPT. I start the timer with gptStartContinuous(), and set the next interval with gptChangeIntervalI() from the timer callback procedure.

The problem is that at the moment I call gptChangeIntervalI(), the next interval is already counting, and its length is not affected by the call. So the interval change is applied at the end of this next interval only.

Obviously, I can do that by creating a task and use the chThdSleepMilliseconds() or like.
But does anybody know how to implement this without allocating a task for it?

Regards,
Vladimir

You should check the reference manual for your chip. E.g. the STM32F446 and also others have a preload bit which enables the shadow register. (ARPE)

Bit7 ARPE:Auto-reloadpreloadenable
0: TIMx_ARR register is not buffered
1: TIMx_ARR register is buffered

Hello,

If you want to stick to ChibiOS API instead of directly tweaking MCU registers, you can use one shot timer instead of continuous :

you initially start timer by gptStartOneShot, and in the callback you call gptStartOneShotI with the new interval.

If you timing accuracy is lower than your systick period*, you can also use the virtual timer API , see chVTxxx functions.

* virtual timer will count at CH_CFG_ST_FREQUENCY (chconf.h) frequency.

Alexandre

wurstnase wrote:You should check the reference manual for your chip. E.g. the STM32F446 and also others have a preload bit which enables the shadow register. (ARPE)
...

Thanks, it did the trick! The only downside is I have to fix it in the ChibiOS code, since the value 1 of the bit is hardwired in the gpt_lld_start_timer() function

PS Giovanni, may it is worth to make this flag configurable?

Hi,

I prefer no, because without buffering there is a dangerous race condition. The risk is to set the ARR register to a value lower than the current counter value, this would result in the driver having to wait for the counter to overflow and go back before match can occur.

Giovanni