ChibiOS Free Embedded RTOS

Hello,

in my several years old ChibiOS application (STM32F407), there was eth_ram region in the linker script. A 16k block located at 0x2001c000. According to the map file, this block was exclusively used by mac_lld.o, and nearly all of the 16kB were used.

In actual ChibiOS linker script, this region is called ram2. However, all data seems to be located in ram0, which is the sum of ram1+ram2 (contiguous blocks).

Everything works fine, I just wonder why there was a special eth_ram section in the past? Is it a special hardware-accelerated region with optimized connection to MAC peripheral? Do we loose network performance when not using this region any more? Or is it just regular SRAM? The manual says that the STM32 has 2kB RX and TX FIFOs, but I guess those are inside the peripheral and not part of any linker section.

Thanks for explanation!
Rubenswerk

Hi,

It is about how SRAM appears on the bus matrix, it is better to have ETH buffers to be in a separate SRAM slave, that optimizes the internal bandwidth usage, look at the matrix diagram in the F7 RM.

Giovanni

I checked the RM and tried to understand the matrix picture, well I think at least I understood a part of it
Looks like we can avoid concurrent memory access when using this 16kB SRAM2 for MAC buffers.

I added the following section to project specific linker script:



For the rest of the data you have to use ram1 instad of combined ram0 of course.

Thanks.