WB vs WL, it seems a lot of differences: HSI48/no HSI48 2 LSI/ 1 LSI USB/no USB PLLSAI/no PLLSAI HCLK1,2,4,5/HCLK1,3 SMPSDIV/no SMPSDIV different radio subsystem no RADIO SPI/RADIO SPI 2 cores/ 1 core for current available MCU WLE4/5 etc...
If you are planing to make WL port then there is no reason to support two ports for one MCU, so I can contribute code as well and help with porting/testing if you need it.
Hi, FYI the ST stacks for CPU2 use the IPCC and HSEM to talk to the CPU1 side. Those critical drivers required for both WB and WL don't exist yet for ChibiOS. Ilya has done a great start on WB and that is WIP for now.
Unless you want to write stacks for CPU2 yourself the best path is to use ST stacks and understand the CPU1<->CPU2 handling as shown in Cube (CubeWL template only is on github now). -- Bob
as I understand there is no second core in WLExx MCUs. According stm32wl54xx.h/stm32wl55xx.h dual core will be available in WL54/WL55, but documentation has not been published yet...
Hi, That's correct about the LE. The dual core devices are more interesting although more challenging. If writing your own LoRa driver I guess the LE would be a suitable choice.
You will find WL5x data sheets etc. in the product pages. The NUCLEO-WL55 is due soon. -- Bob
Some notes: 1. SPIR is SUBGHZSPI 2. RTR in stm32_register.h is Radio Transceiver abbreviation 3. NUCLEO-WL5JC board and standard demo added 4. Changes summary:
new file: demos/STM32/RT-STM32WL5JC-NUCLEO/Makefile new file: demos/STM32/RT-STM32WL5JC-NUCLEO/cfg/chconf.h new file: demos/STM32/RT-STM32WL5JC-NUCLEO/cfg/halconf.h new file: demos/STM32/RT-STM32WL5JC-NUCLEO/cfg/mcuconf.h new file: demos/STM32/RT-STM32WL5JC-NUCLEO/main.c new file: os/common/ext/ST/STM32WLxx/stm32wl54xx.h new file: os/common/ext/ST/STM32WLxx/stm32wl55xx.h new file: os/common/ext/ST/STM32WLxx/stm32wle4xx.h new file: os/common/ext/ST/STM32WLxx/stm32wle5xx.h new file: os/common/ext/ST/STM32WLxx/stm32wlxx.h new file: os/common/ext/ST/STM32WLxx/system_stm32wlxx.h new file: os/common/startup/ARMCMx/compilers/GCC/ld/STM32WLExx8.ld new file: os/common/startup/ARMCMx/compilers/GCC/ld/STM32WLExxB.ld new file: os/common/startup/ARMCMx/compilers/GCC/ld/STM32WLExxC.ld new file: os/common/startup/ARMCMx/compilers/GCC/ld/STM32WLxxC.ld new file: os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32wlxx.mk new file: os/common/startup/ARMCMx/devices/STM32WLxx/cmparams.h new file: os/hal/boards/ST_NUCLEO_WL5JC/board.c new file: os/hal/boards/ST_NUCLEO_WL5JC/board.h new file: os/hal/boards/ST_NUCLEO_WL5JC/board.mk new file: os/hal/boards/ST_NUCLEO_WL5JC/cfg/board.chcfg new file: os/hal/boards/ST_NUCLEO_WL5JC/cfg/board.fmpp new file: os/hal/ports/STM32/LLD/EXTIv1/stm32_exti16_34.inc new file: os/hal/ports/STM32/LLD/EXTIv1/stm32_exti45.inc modified: os/hal/ports/STM32/LLD/SPIv2/hal_spi_lld.c modified: os/hal/ports/STM32/LLD/SPIv2/hal_spi_lld.h modified: os/hal/ports/STM32/LLD/TIMv1/hal_st_lld.c new file: os/hal/ports/STM32/STM32WLxx/hal_efl_lld.c new file: os/hal/ports/STM32/STM32WLxx/hal_efl_lld.h new file: os/hal/ports/STM32/STM32WLxx/hal_lld.c new file: os/hal/ports/STM32/STM32WLxx/hal_lld.h new file: os/hal/ports/STM32/STM32WLxx/platform.mk new file: os/hal/ports/STM32/STM32WLxx/stm32_dmamux.h new file: os/hal/ports/STM32/STM32WLxx/stm32_isr.c new file: os/hal/ports/STM32/STM32WLxx/stm32_isr.h new file: os/hal/ports/STM32/STM32WLxx/stm32_rcc.h new file: os/hal/ports/STM32/STM32WLxx/stm32_registry.h new file: tools/ftl/schema/boards/stm32wlxx_board.xsd
it is L4 except RCC and RTC, plus Sub GHz Radio, optional M0+ core, hw semaphores and optional security subsystems. I have noticed new LLD/RCCv1 module, but it can not be used directly with STM32WL port without some modification.
