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BDMA double buffer mode on STM32H7xx Rev. Y

Posted: Tue Mar 16, 2021 9:07 pm
by equinox
Hi,

I'm currently working on a project based on a STM32H743 that needs all 4 SAI units running simultaneously at 48kHz sample rate. Each SAI block has to handle 8 audio samples at 24bit. IMHO the only way to handle this much data is to implement a zero-copy scheme based on the DMA double buffer mode. According to the datasheet DMA1, DMA2 as well as BDMA support double buffer mode on STM32H7xx. However the BDMAv1 driver only activates this for the newer revisions of the MCU.

Code: Select all

#if !defined(STM32_ENFORCE_H7_REV_XY)
#define STM32_BDMA_CR_DBM                   BDMA_CCR_DBM
#define STM32_BDMA_CR_CM                    BDMA_CCR_CT
#endif

Unfortunately our prototype boards are a little bit older and therefore use the old revision Y (Rev.ID 0x1003). Since i couldn't find any document that suggests BDMA double buffer mode is only available on newer revision of the MCU, i patched the BDMAv1 driver (see attachment) to test it. Using this patch everything works as expected. Is there a reason why double buffer mode is deactivated for revision Y?

regards
christian

Re: BDMA double buffer mode on STM32H7xx Rev. Y

Posted: Tue Mar 16, 2021 9:45 pm
by Giovanni
I don't remember the reason, perhaps some undefined bit in headers.

Giovanni

Re: BDMA double buffer mode on STM32H7xx Rev. Y

Posted: Sun Dec 05, 2021 10:49 am
by Giovanni
bumping as self-reminder

Re: BDMA double buffer mode on STM32H7xx Rev. Y

Posted: Wed Mar 16, 2022 5:17 pm
by Giovanni
Hi,

Check removed in trunk and 21.11.x.

Giovanni