ChibiOS Free Embedded RTOS

Posted: **Thu Jan 30, 2025 10:52 am**

Hello everyone. Can one of you check if I have set my mcuconfig.h correctly? I have parameterised everything in STM32CubeMX to help me and (hopefully correctly) adopted it.
I'm using an STM32F4 with a 12MHz Osc

Code: Select all

/*
 * HAL driver system settings.
 */
#define STM32_NO_INIT                       FALSE
#define STM32_PVD_ENABLE                    FALSE
#define STM32_PLS                           STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE                 FALSE
#define STM32_HSI_ENABLED                   TRUE
#define STM32_LSI_ENABLED                   TRUE
#define STM32_HSE_ENABLED                   TRUE
#define STM32_LSE_ENABLED                   FALSE
#define STM32_CLOCK48_REQUIRED              TRUE
#define STM32_SW                            STM32_SW_PLL
#define STM32_PLLSRC                        STM32_PLLSRC_HSE
#define STM32_PLLM_VALUE                    6
#define STM32_PLLN_VALUE                    100
#define STM32_PLLP_VALUE                    2
#define STM32_PLLQ_VALUE                    2
#define STM32_HPRE                          STM32_HPRE_DIV1
#define STM32_PPRE1                         STM32_PPRE1_DIV2
#define STM32_PPRE2                         STM32_PPRE2_DIV1
#define STM32_PLLI2SSRC                     STM32_PLLI2SSRC_PLLSRC
#define STM32_I2SCKIN_VALUE                 0
#define STM32_PLLI2SM_VALUE                 8
#define STM32_PLLI2SN_VALUE                 192
#define STM32_PLLI2SR_VALUE                 4
#define STM32_PLLI2SQ_VALUE                 4
#define STM32_PLLI2SDIVR_VALUE              1
#define STM32_PLLDIVR_VALUE                 1
#define STM32_SAI1SEL                       STM32_SAI1SEL_OFF
#define STM32_SAI2SEL                       STM32_SAI2SEL_OFF
#define STM32_TIMPRE                        STM32_TIMPRE_PCLK
#define STM32_CK48MSEL                      STM32_CK48MSEL_PLL
#define STM32_RTCSEL                        STM32_RTCSEL_LSI
#define STM32_RTCPRE_VALUE                  8
#define STM32_MCO1SEL                       STM32_MCO1SEL_HSI
#define STM32_MCO1PRE                       STM32_MCO1PRE_DIV1
#define STM32_MCO2SEL                       STM32_MCO2SEL_SYSCLK
#define STM32_MCO2PRE                       STM32_MCO2PRE_DIV5

According to this, APB1 should be 50MHz, right?
If I now use this 50MHz for the calculation of a CANbus baud rate, then I am unfortunately incorrect. Instead of the calculated 500kbps, I end up with 381.68kbps (measured by oscilloscope).
My setting for this is:

Code: Select all

static const CANConfig cancfg = {
  CAN_MCR_ABOM | CAN_MCR_AWUM | CAN_MCR_TXFP, 
  CAN_BTR_SJW(1) | CAN_BTR_TS2(1) | CAN_BTR_TS1(8) | CAN_BTR_BRP(10)
};

Where is my fault?

Posted: **Thu Jan 30, 2025 12:45 pm**

Hi,

It is possible you have a wrong xtal frequency defined in board.h, your values are correct for a 12MHz xtal, do a review on your board files (there could be other wrong settings in there).

You should enable MCO and verify the frequency on the pin.

Giovanni

Posted: **Thu Jan 30, 2025 12:59 pm**

Nope

Code: Select all

#if !defined(STM32_HSECLK)
#define STM32_HSECLK                12000000U
#endif

Unfortunately, that's not the fault.
Surprisingly, the UARTS that have been put into operation in the meantime run at the correct baud rate via SD Driver

Posted: **Thu Jan 30, 2025 3:11 pm**

Then the error is in the CAN configuration or its input frequency, other clocks seem to be fine.

Giovanni

Posted: **Fri Jan 31, 2025 8:47 pm**

Where is my fault?

Hello,

Clock tree is indeed fine, but all the subfield CAN_BTR_SJW CAN_BTR_TS2 CAN_BTR_TS1 CAN_BTR_BRP have a minimum length of 1, so you must specify N-1 for all these fields c.a.d if you want a value of 1, you must specify 0 .

you should write this : CAN_BTR_SJW(0) | CAN_BTR_TS2(0) | CAN_BTR_TS1(7) | CAN_BTR_BRP(9)

since you have lengthened the tq, and you divide the clock source by 11 instead 10, you have lowered the bitrate.

hope this help.

Alexandre

ChibiOS Free Embedded RTOS

Unsure about clock tree configuration (because the CANbus baud rate is not correct)

Unsure about clock tree configuration (because the CANbus baud rate is not correct)

Re: Unsure about clock tree configuration (because the CANbus baud rate is not correct)

Re: Unsure about clock tree configuration (because the CANbus baud rate is not correct)

Re: Unsure about clock tree configuration (because the CANbus baud rate is not correct)

Re: Unsure about clock tree configuration (because the CANbus baud rate is not correct)