ChibiOS Free Embedded RTOS

Posted: **Thu Nov 08, 2012 11:35 am**

Hello I use STM32f207VCT6 + KSZ8031 + ChibiOS 2.4.2.
I found a problem when using the MAC.
My schema:
STM MCO1 out 25MHz -> PHY XI input
PHY XI multiplied x2 REF_CLK out 50MHz -> STM ETH_RMII_REF_CLK input
If PHY in POWER_DOWN mode -> REF_CLK out 0MHz

The file ChibiOS_2.4.2/os/hal/platforms/STM32/mac_lld.c function mac_lld_start ():

Code: Select all

void mac_lld_start(MACDriver *macp) {
  unsigned i;

  /* Resets the state of all descriptors.*/
  for (i = 0; i < STM32_MAC_RECEIVE_BUFFERS; i++)
    rd[i].rdes0 = STM32_RDES0_OWN;
  macp->rxptr = (stm32_eth_rx_descriptor_t *)rd;
  for (i = 0; i < STM32_MAC_TRANSMIT_BUFFERS; i++)
    td[i].tdes0 = STM32_TDES0_TCH;
  macp->txptr = (stm32_eth_tx_descriptor_t *)td;

  /* MAC clocks activation and commanded reset procedure.*/
  rccEnableETH(FALSE);
  ETH->DMABMR |= ETH_DMABMR_SR;
  while(ETH->DMABMR & ETH_DMABMR_SR)
    ;

  /* ISR vector enabled.*/
  nvicEnableVector(ETH_IRQn, CORTEX_PRIORITY_MASK(STM32_ETH1_IRQ_PRIORITY));

  /* PHY in power up mode.*/
  mii_write(macp, MII_BMCR, mii_read(macp, MII_BMCR) & ~BMCR_PDOWN);
....

line while (ETH-> DMABMR & ETH_DMABMR_SR) wait indefinitely until STM ETH_RMII_REF_CLK = 0MHz.

my change:

Code: Select all

void mac_lld_start(MACDriver *macp) {
  unsigned i;

  /* Resets the state of all descriptors.*/
  for (i = 0; i < STM32_MAC_RECEIVE_BUFFERS; i++)
    rd[i].rdes0 = STM32_RDES0_OWN;
  macp->rxptr = (stm32_eth_rx_descriptor_t *)rd;
  for (i = 0; i < STM32_MAC_TRANSMIT_BUFFERS; i++)
    td[i].tdes0 = STM32_TDES0_TCH;
  macp->txptr = (stm32_eth_tx_descriptor_t *)td;

  /* MAC clocks activation and commanded reset procedure.*/
  rccEnableETH(FALSE);
  /* PHY in power up mode.*/
  mii_write(macp, MII_BMCR, mii_read(macp, MII_BMCR) & ~BMCR_PDOWN);
  ETH->DMABMR |= ETH_DMABMR_SR;
  while(ETH->DMABMR & ETH_DMABMR_SR)
    ;

  /* ISR vector enabled.*/
  nvicEnableVector(ETH_IRQn, CORTEX_PRIORITY_MASK(STM32_ETH1_IRQ_PRIORITY));

  /* PHY in power up mode.*/
//  mii_write(macp, MII_BMCR, mii_read(macp, MII_BMCR) & ~BMCR_PDOWN);
....

This problem may be with other PHYs.
Thank you.

Posted: **Tue Nov 13, 2012 6:43 pm**

From your description your problem seems to be similar to the one I reported here:

http://sourceforge.net/tracker/?func=de ... tid=995489

And that Giovanni already fixed, though I think you'll need to use the trunk to have it or wait till 2.5.1 unstable release.

Also, in the future please post a diff instead of (or in addition to) the two pieces of code. The former is much easier to read.

BTW, your code seems to actuall disable power up of the PHY, instead of what would actually fix the problem (disabling powerdown of the PHY).

Rgds.

Posted: **Tue Apr 23, 2013 8:07 pm**

JerryR's fix worked for Micrel KSZ8041. Not sure about iggarpe's diff.

The driver just worked with the definition of the PHY ID, but perhaps it was glitchy. Upon transport and re-setup of the system, we were hanging in mac_lld.c, line ~315:

Code: Select all

  ETH->DMABMR |= ETH_DMABMR_SR;
  while(ETH->DMABMR & ETH_DMABMR_SR)
    ;

Posted: **Wed Apr 24, 2013 3:15 pm**

Excerpted from above post. Move this line in mac_lld.c->mac_lld_start(MACDriver *macp) from below nvicEnableVector to above ETH->DMABMR |= ETH_DMABMR_SR.

Code: Select all

 /* PHY in power up mode.*/
  mii_write(macp, MII_BMCR, mii_read(macp, MII_BMCR) & ~BMCR_PDOWN);

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