Hi
Using STM32H563 Nucleo RTC and Alarm A. I hit a sysHalt() in rtc_lld_serve_interrupt() at the STM32_RTC_CLEAR_ALL_EXTI() at the first alarm.
Screenshot 2026-03-19 201537.png
Screenshot 2026-03-19 204619.png
#define STM32_EXTI_IMR1_MASK 0xFFFE0000U is maybe not correct ?
Thanks
Search found 13 matches
- Thu Mar 19, 2026 9:25 pm
- Forum: Bug Reports
- Topic: STM32H563 RTC Alarm A sysHalt
- Replies: 3
- Views: 410
- Sun Aug 31, 2025 6:32 pm
- Forum: Bug Reports
- Topic: STM32H5xx/stm32_limits.h
- Replies: 1
- Views: 11695
STM32H5xx/stm32_limits.h
#81 #define STM32_VOS1_PCLK2_MAX 200000000
should be
#define STM32_VOS1_PCLK3_MAX 200000000
I think
should be
#define STM32_VOS1_PCLK3_MAX 200000000
I think
- Sat Oct 05, 2024 2:53 pm
- Forum: Bug Reports
- Topic: STM32H573I-DISCOVERY
- Replies: 3
- Views: 42087
STM32H573I-DISCOVERY
I have got serial, LED blinky and shell working on the STM32H573I-DK.
But when I add in SDC I have a problem. In 'hal_lld.c':
/**
* @brief SDMMC1 clock frequency.
*/
#if (STM32_SDMMC1SEL == STM32_SDMMC1SEL_PLL1Q) || defined(__DOXYGEN__)
#define STM32_SDMMC1CLK hal_lld_get_clock ...
But when I add in SDC I have a problem. In 'hal_lld.c':
/**
* @brief SDMMC1 clock frequency.
*/
#if (STM32_SDMMC1SEL == STM32_SDMMC1SEL_PLL1Q) || defined(__DOXYGEN__)
#define STM32_SDMMC1CLK hal_lld_get_clock ...
- Mon Feb 27, 2017 10:22 pm
- Forum: Small Change Requests
- Topic: [INFO] Flash Driver model
- Replies: 27
- Views: 29441
Re: [INFO] Flash Driver model
Got it, thank you Giovanni 
- Mon Feb 27, 2017 10:08 pm
- Forum: Small Change Requests
- Topic: [INFO] Flash Driver model
- Replies: 27
- Views: 29441
Re: [INFO] Flash Driver model
Hi,
Is there a demo for this driver?
An earlier post mentions these but I couldn't locate them.
- Demo for STM32F3-Discovery and N25Q128 in SPI mode.
- Demo for STM32L476-Discovery and N25Q128 in QSPI mode.
Thank you
Is there a demo for this driver?
An earlier post mentions these but I couldn't locate them.
- Demo for STM32F3-Discovery and N25Q128 in SPI mode.
- Demo for STM32L476-Discovery and N25Q128 in QSPI mode.
Thank you
- Fri Nov 04, 2016 5:04 pm
- Forum: ChibiOS/RT
- Topic: Events have overtaken me
- Replies: 1
- Views: 2467
Events have overtaken me
I want to wait on two eventflags_t being set. Is that possible?
I see chEvtWaitAll() but that appears to wait on events. Is the only way to do it to register two event listeners?
Thank you
I see chEvtWaitAll() but that appears to wait on events. Is the only way to do it to register two event listeners?
Thank you
- Fri Jan 22, 2016 10:13 pm
- Forum: General Support
- Topic: lwip timers
- Replies: 1
- Views: 2270
lwip timers
I wonder if there is an issue with the function sys_arch_mbox_fetch() in the file os\various\lwip_bindings\arch\sys_arch.c
LWIP sets its DHCP timers in milliseconds but sys_arch_mbox() uses system ticks.
Should the calls to osalOsGetSystemTimeX() within sys_arch_mbox() be converted with ST2MS ...
LWIP sets its DHCP timers in milliseconds but sys_arch_mbox() uses system ticks.
Should the calls to osalOsGetSystemTimeX() within sys_arch_mbox() be converted with ST2MS ...
- Thu Oct 15, 2015 4:08 pm
- Forum: STM32 Support
- Topic: STM32F746 DISCO Bss Section Overflow
- Replies: 6
- Views: 4375
Re: STM32F746 DISCO Bss Section Overflow
Thank you Giovanni 
- Thu Oct 15, 2015 3:42 pm
- Forum: STM32 Support
- Topic: STM32F746 DISCO Bss Section Overflow
- Replies: 6
- Views: 4375
Re: STM32F746 DISCO Bss Section Overflow
Ah I see, thank you. Should then your article http://chibios.org/dokuwiki/doku.php?id=chibios:articles:cortexm7_dma_guide say :-
Advantages
Does not require active runtime-handling.
It is perfectly transparent to the application.
Does not have any performance hit.
DTCM RAM is ...
Advantages
Does not require active runtime-handling.
It is perfectly transparent to the application.
Does not have any performance hit.
DTCM RAM is ...
- Thu Oct 15, 2015 3:27 pm
- Forum: STM32 Support
- Topic: STM32F746 DISCO Bss Section Overflow
- Replies: 6
- Views: 4375
Re: STM32F746 DISCO Bss Section Overflow
Thank you Giovanni,
ITCM-RAM "ram4" is the 16KB area optimized for DMA accesses that could be used for dedicated DMA RAM?
ITCM-RAM "ram4" is the 16KB area optimized for DMA accesses that could be used for dedicated DMA RAM?