STM32F746 Disco use of MFS

[lemmy]

Hi

I am trying to get MFS to sit on top of the XSNOR N25Q QSPI but I get a hard fault in initialisation hal_flash.c flashGetSectorOffset()

const flash_descriptor_t *descriptor = flashGetDescriptor(devp) maps down onto the n25q vmt function

.init = __n25q_init_impl,

so descriptor is returned as 0 (FLASH_NO_ERROR) and hard fault.

Anyone got MFS working on the F746 Disco and can give me some pointers (

Thanks

[Giovanni]

Hi,

The fault comes from the pointer you give MFS: flashp must point to the flash interface inside the XSNOR object, not to the object itself. With the object pointer, MFS calls into the driver's own VMT, which is why you end up in __n25q_init_impl. Use the OOP accessor:

Code: Select all

static hal_xsnor_micron_n25q_c snor1;

const MFSConfig mfscfg1 = {
  .flashp        = oopGetIf(&snor1, fls),
  .erased        = 0xFFFFFFFFU,
  .bank_size     = 4096U,
  .bank0_start   = 0U,
  .bank0_sectors = 1U,
  .bank1_start   = 1U,
  .bank1_sectors = 1U
};

Call n25qObjectInit(&snor1), then xsnorStart(&snor1, &snorcfg), and check that it returns FLASH_NO_ERROR before mfsStart().

• On the F746-Discovery you also need:
• QSPI pins: the board file leaves them as inputs. Set PB2, PD11, PD12, PE2 and PD13 to AF9, and PB6 (NCS) to AF10 with pull-up, all at highest speed.
• Prescaler: set STM32_WSPI_QUADSPI1_PRESCALER_VALUE to 3, which gives 72 MHz. With 8 dummy cycles the N25Q128 allows at most 95 MHz in quad I/O mode. 108 MHz needs N25Q_OPT_DUMMY_CYCLES(10) and is also the STM32's maximum.
• Buffers: declare the xsnor_buffers_t as a __nocache_ variable. The linker puts it in DTCM, which is not cached and is reachable by DMA.

There is now a complete example on master: testhal/STM32/multi/WSPI-MFS, built with make -f make/stm32f746_discovery.make. It has been build-tested but not yet run on a board, so let us know how it goes on yours.

Giovanni