voltage detection

daviddawe1982 · Post by **daviddawe1982** » Sun Apr 28, 2013 7:31 am

Hello,
Could some one please point me in the right direction .
What i want to do is on my adc i want to detect a voltage and turn on one of the onboard leds
say
if 0.5 then turn on led 4
if 0.3 then turn on led 3

how would i go about this
i am using a stm32f4 discovery
thanks

Post by **Giovanni** » Sun Apr 28, 2013 7:41 am

Hi,

There is an ADC demo under ./testhal/STM32F4xx/ADC. Basically:

adcStart();
...
adcConvert(...);

Modify the conversion group structure to include just one channel, the one you want to sample, in the conversion sequence. Also make sure to program the pin associated to the channel as "analog".

Giovanni

daviddawe1982 · Post by **daviddawe1982** » Sun Apr 28, 2013 3:10 pm

when i try to build the example

pwmEnableChannelI(&PWMD4, 0, PWM_FRACTION_TO_WIDTH(&PWMD4, 4096, avg_ch1));

gives an could not be resolved error
what am i not including??

Tectu · Post by **Tectu** » Sun Apr 28, 2013 3:21 pm

When you need the PWM driver, you have to enable the PWM subsystem in the halconf.h and then you have to enable the corresponding PWM/TMR driver in the mcuconf.h

~ Tectu

daviddawe1982 · Post by **daviddawe1982** » Sun Apr 28, 2013 4:01 pm

the error pops up when i include the /stm32/pwm_lld
what one should i be using?

daviddawe1982 · Post by **daviddawe1982** » Sun Apr 28, 2013 4:26 pm

yes i just found that :roll:

but it still will not clear the error the code i am trying to build is
http://www.chibios.org/dokuwiki/doku.ph ... overy:code

Tectu · Post by **Tectu** » Sun Apr 28, 2013 4:33 pm

Can you please give us more detailed information about your setup and paste the full compiler output using the [code] [ /code] tags? (Remove the space before the slash)

~ Tectu

daviddawe1982 · Post by **daviddawe1982** » Sun Apr 28, 2013 5:16 pm

ok i worked that one out thank you
now i only have this SD2 error
/*
* Activates the serial driver 1 using the driver default configuration.
* PA2(TX) and PA3(RX) are routed to USART2.
*/
sdStart(&SD2, NULL);

the SD2 shows a "could not be resolved" error
main

Code: Select all

 
/*

    ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,

                 2011 Giovanni Di Sirio.



    This file is part of ChibiOS/RT.



    ChibiOS/RT is free software; you can redistribute it and/or modify

    it under the terms of the GNU General Public License as published by

    the Free Software Foundation; either version 3 of the License, or

    (at your option) any later version.



    ChibiOS/RT is distributed in the hope that it will be useful,

    but WITHOUT ANY WARRANTY; without even the implied warranty of

    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

    GNU General Public License for more details.



    You should have received a copy of the GNU General Public License

    along with this program.  If not, see <http://www.gnu.org/licenses/>.

*/



#include "ch.h"

#include "hal.h"

#include "test.h"



static void pwmpcb(PWMDriver *pwmp);

static void adccb(ADCDriver *adcp, adcsample_t *buffer, size_t n);

static void spicb(SPIDriver *spip);



/* Total number of channels to be sampled by a single ADC operation.*/

#define ADC_GRP1_NUM_CHANNELS   2



/* Depth of the conversion buffer, channels are sampled four times each.*/

#define ADC_GRP1_BUF_DEPTH      4



/*

 * ADC samples buffer.

 */

static adcsample_t samples[ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH];



/*

 * ADC conversion group.

 * Mode:        Linear buffer, 4 samples of 2 channels, SW triggered.

 * Channels:    IN11   (48 cycles sample time)

 *              Sensor (192 cycles sample time)

 */

static const ADCConversionGroup adcgrpcfg = {

  FALSE,

  ADC_GRP1_NUM_CHANNELS,

  adccb,

  NULL,

  /* HW dependent part.*/

  0,

  ADC_CR2_SWSTART,

  ADC_SMPR1_SMP_AN11(ADC_SAMPLE_56) | ADC_SMPR1_SMP_SENSOR(ADC_SAMPLE_144),

  0,

  ADC_SQR1_NUM_CH(ADC_GRP1_NUM_CHANNELS),

  0,

  ADC_SQR3_SQ2_N(ADC_CHANNEL_IN11) | ADC_SQR3_SQ1_N(ADC_CHANNEL_SENSOR)

};



/*

 * PWM configuration structure.

 * Cyclic callback enabled, channels 1 and 4 enabled without callbacks,

 * the active state is a logic one.

 */

static PWMConfig pwmcfg = {

  10000,                                    /* 10KHz PWM clock frequency.   */

  10000,                                    /* PWM period 1S (in ticks).    */

  pwmpcb,

  {

    {PWM_OUTPUT_ACTIVE_HIGH, NULL},

    {PWM_OUTPUT_DISABLED, NULL},

    {PWM_OUTPUT_DISABLED, NULL},

    {PWM_OUTPUT_ACTIVE_HIGH, NULL}

  },

  /* HW dependent part.*/

  0

};



/*

 * SPI configuration structure.

 * Maximum speed (12MHz), CPHA=0, CPOL=0, 16bits frames, MSb transmitted first.

 * The slave select line is the pin GPIOA_SPI1NSS on the port GPIOA.

 */

static const SPIConfig spicfg = {

  spicb,

  /* HW dependent part.*/

  GPIOB,

  12,

  SPI_CR1_DFF

};



/*

 * PWM cyclic callback.

 * A new ADC conversion is started.

 */

static void pwmpcb(PWMDriver *pwmp) {



  (void)pwmp;



  /* Starts an asynchronous ADC conversion operation, the conversion

     will be executed in parallel to the current PWM cycle and will

     terminate before the next PWM cycle.*/

  chSysLockFromIsr();

  adcStartConversionI(&ADCD1, &adcgrpcfg, samples, ADC_GRP1_BUF_DEPTH);

  chSysUnlockFromIsr();

}



/*

 * ADC end conversion callback.

 * The PWM channels are reprogrammed using the latest ADC samples.

 * The latest samples are transmitted into a single SPI transaction.

 */

void adccb(ADCDriver *adcp, adcsample_t *buffer, size_t n) {



  (void) buffer; (void) n;

  /* Note, only in the ADC_COMPLETE state because the ADC driver fires an

     intermediate callback when the buffer is half full.*/

  if (adcp->state == ADC_COMPLETE) {

    adcsample_t avg_ch1, avg_ch2;



    /* Calculates the average values from the ADC samples.*/

    avg_ch1 = (samples[0] + samples[2] + samples[4] + samples[6]) / 4;

    avg_ch2 = (samples[1] + samples[3] + samples[5] + samples[7]) / 4;



    chSysLockFromIsr();



    /* Changes the channels pulse width, the change will be effective

       starting from the next cycle.*/

    pwmEnableChannelI(&PWMD4, 0, PWM_FRACTION_TO_WIDTH(&PWMD4, 4096, avg_ch1));

    pwmEnableChannelI(&PWMD4, 3, PWM_FRACTION_TO_WIDTH(&PWMD4, 4096, avg_ch2));

    /* SPI slave selection and transmission start.*/

    spiSelectI(&SPID2);

    spiStartSendI(&SPID2, ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH, samples);



    chSysUnlockFromIsr();

  }

}



/*

 * SPI end transfer callback.

 */

static void spicb(SPIDriver *spip) {



  /* On transfer end just releases the slave select line.*/

  chSysLockFromIsr();

  spiUnselectI(spip);

  chSysUnlockFromIsr();

}



/*

 * This is a periodic thread that does absolutely nothing except flashing

 * a LED.

 */

static WORKING_AREA(waThread1, 128);

static msg_t Thread1(void *arg) {



  (void)arg;

  chRegSetThreadName("blinker");

  while (TRUE) {

    palSetPad(GPIOD, GPIOD_LED3);       /* Orange.  */

    chThdSleepMilliseconds(500);

    palClearPad(GPIOD, GPIOD_LED3);     /* Orange.  */

    chThdSleepMilliseconds(500);

  }

}



/*

 * Application entry point.

 */

int main(void) {



  /*

   * System initializations.

   * - HAL initialization, this also initializes the configured device drivers

   *   and performs the board-specific initializations.

   * - Kernel initialization, the main() function becomes a thread and the

   *   RTOS is active.

   */

  halInit();

  chSysInit();



  /*

   * Activates the serial driver 1 using the driver default configuration.

   * PA2(TX) and PA3(RX) are routed to USART2.

   */

  sdStart(&SD2, NULL);

  palSetPadMode(GPIOA, 2, PAL_MODE_ALTERNATE(7));

  palSetPadMode(GPIOA, 3, PAL_MODE_ALTERNATE(7));



  /*

   * If the user button is pressed after the reset then the test suite is

   * executed immediately before activating the various device drivers in

   * order to not alter the benchmark scores.

   */

  if (palReadPad(GPIOA, GPIOA_BUTTON))

    TestThread(&SD2);



  /*

   * Initializes the SPI driver 2. The SPI2 signals are routed as follow:

   * PB12 - NSS.

   * PB13 - SCK.

   * PB14 - MISO.

   * PB15 - MOSI.

   */

  spiStart(&SPID2, &spicfg);

  palSetPad(GPIOB, 12);

  palSetPadMode(GPIOB, 12, PAL_MODE_OUTPUT_PUSHPULL |

                           PAL_STM32_OSPEED_HIGHEST);           /* NSS.     */

  palSetPadMode(GPIOB, 13, PAL_MODE_ALTERNATE(5) |

                           PAL_STM32_OSPEED_HIGHEST);           /* SCK.     */

  palSetPadMode(GPIOB, 14, PAL_MODE_ALTERNATE(5));              /* MISO.    */

  palSetPadMode(GPIOB, 15, PAL_MODE_ALTERNATE(5) |

                           PAL_STM32_OSPEED_HIGHEST);           /* MOSI.    */



  /*

   * Initializes the ADC driver 1 and enable the thermal sensor.

   * The pin PC0 on the port GPIOC is programmed as analog input.

   */

  adcStart(&ADCD1, NULL);

  adcSTM32EnableTSVREFE();

  palSetPadMode(GPIOC, 1, PAL_MODE_INPUT_ANALOG);



  /*

   * Initializes the PWM driver 4, routes the TIM4 outputs to the board LEDs.

   */

  pwmStart(&PWMD4, &pwmcfg);

  palSetPadMode(GPIOD, GPIOD_LED4, PAL_MODE_ALTERNATE(2));  /* Green.   */

  palSetPadMode(GPIOD, GPIOD_LED6, PAL_MODE_ALTERNATE(2));  /* Blue.    */



  /*

   * Creates the example thread.

   */

  chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL);



  /*

   * Normal main() thread activity, in this demo it does nothing except

   * sleeping in a loop and check the button state, when the button is

   * pressed the test procedure is launched with output on the serial

   * driver 2.

   */

  while (TRUE) {

    if (palReadPad(GPIOA, GPIOA_BUTTON))

      TestThread(&SD2);

    chThdSleepMilliseconds(500);

  }

}

halconf

Code: Select all

/*

    ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,

                 2011,2012 Giovanni Di Sirio.



    This file is part of ChibiOS/RT.



    ChibiOS/RT is free software; you can redistribute it and/or modify

    it under the terms of the GNU General Public License as published by

    the Free Software Foundation; either version 3 of the License, or

    (at your option) any later version.



    ChibiOS/RT is distributed in the hope that it will be useful,

    but WITHOUT ANY WARRANTY; without even the implied warranty of

    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

    GNU General Public License for more details.



    You should have received a copy of the GNU General Public License

    along with this program.  If not, see <http://www.gnu.org/licenses/>.

*/



/**

 * @file    templates/halconf.h

 * @brief   HAL configuration header.

 * @details HAL configuration file, this file allows to enable or disable the

 *          various device drivers from your application. You may also use

 *          this file in order to override the device drivers default settings.

 *

 * @addtogroup HAL_CONF

 * @{

 */



#ifndef _HALCONF_H_

#define _HALCONF_H_

#include "mcuconf.h"

/**

 * @name    Drivers enable switches

 */

#if !defined(HAL_USE_TM) || defined(__DOXYGEN__)

#define HAL_USE_TM                  TRUE

#endif



/**

 * @brief   Enables the PAL subsystem.

 */

#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)

#define HAL_USE_PAL                 TRUE

#endif



/**

 * @brief   Enables the ADC subsystem.

 */

#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)

#define HAL_USE_ADC                 TRUE

#endif



/**

 * @brief   Enables the CAN subsystem.

 */

#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)

#define HAL_USE_CAN                 FALSE

#endif



/**

 * @brief   Enables the EXT subsystem.

 */

#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)

#define HAL_USE_EXT                 FALSE

#endif



/**

 * @brief   Enables the GPT subsystem.

 */

#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)

#define HAL_USE_GPT                 FALSE

#endif



/**

 * @brief   Enables the I2C subsystem.

 */

#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)

#define HAL_USE_I2C                 FALSE

#endif



/**

 * @brief   Enables the ICU subsystem.

 */

#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)

#define HAL_USE_ICU                 FALSE

#endif



/**

 * @brief   Enables the MAC subsystem.

 */

#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)

#define HAL_USE_MAC                 FALSE

#endif



/**

 * @brief   Enables the MMC_SPI subsystem.

 */

#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)

#define HAL_USE_MMC_SPI             TRUE

#endif



/**

 * @brief   Enables the PWM subsystem.

 */

#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)

#define HAL_USE_PWM                 TRUE

#endif



/**

 * @brief   Enables the RTC subsystem.

 */

#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)

#define HAL_USE_RTC                 FALSE

#endif



/**

 * @brief   Enables the SDC subsystem.

 */

#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)

#define HAL_USE_SDC                 FALSE

#endif



/**

 * @brief   Enables the SERIAL subsystem.

 */

#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)

#define HAL_USE_SERIAL              FALSE

#endif



/**

 * @brief   Enables the SERIAL over USB subsystem.

 */

#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)

#define HAL_USE_SERIAL_USB          FALSE

#endif



/**

 * @brief   Enables the SPI subsystem.

 */

#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)

#define HAL_USE_SPI                 TRUE

#endif



/**

 * @brief   Enables the UART subsystem.

 */

#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)

#define HAL_USE_UART                FALSE

#endif



/**

 * @brief   Enables the USB subsystem.

 */

#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)

#define HAL_USE_USB                 FALSE

#endif

/** @} */



/*===========================================================================*/

/**

 * @name ADC driver related setting

 * @{

 */

/*===========================================================================*/



/**

 * @brief   Enables synchronous APIs.

 * @note    Disabling this option saves both code and data space.

 */

#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)

#define ADC_USE_WAIT                TRUE

#endif



/**

 * @brief   Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.

 * @note    Disabling this option saves both code and data space.

 */

#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)

#define ADC_USE_MUTUAL_EXCLUSION    TRUE

#endif

/** @} */



/*===========================================================================*/

/**

 * @name CAN driver related setting

 * @{

 */

/*===========================================================================*/



/**

 * @brief   Sleep mode related APIs inclusion switch.

 */

#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)

#define CAN_USE_SLEEP_MODE          TRUE

#endif

/** @} */



/*===========================================================================*/

/**

 * @name I2C driver related setting

 * @{

 */

/*===========================================================================*/



/**

 * @brief   Enables the mutual exclusion APIs on the I2C bus.

 */

#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)

#define I2C_USE_MUTUAL_EXCLUSION    TRUE

#endif

/** @} */



/*===========================================================================*/

/**

 * @name MAC driver related setting

 * @{

 */

/*===========================================================================*/



/**

 * @brief   Enables an event sources for incoming packets.

 */

#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)

#define MAC_USE_EVENTS              TRUE

#endif

/** @} */



/*===========================================================================*/

/**

 * @name MMC_SPI driver related setting

 * @{

 */

/*===========================================================================*/



/**

 * @brief   Block size for MMC transfers.

 */

#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__)

#define MMC_SECTOR_SIZE             512

#endif



/**

 * @brief   Delays insertions.

 * @details If enabled this options inserts delays into the MMC waiting

 *          routines releasing some extra CPU time for the threads with

 *          lower priority, this may slow down the driver a bit however.

 *          This option is recommended also if the SPI driver does not

 *          use a DMA channel and heavily loads the CPU.

 */

#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)

#define MMC_NICE_WAITING            TRUE

#endif



/**

 * @brief   Number of positive insertion queries before generating the

 *          insertion event.

 */

#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__)

#define MMC_POLLING_INTERVAL        10

#endif



/**

 * @brief   Interval, in milliseconds, between insertion queries.

 */

#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__)

#define MMC_POLLING_DELAY           10

#endif



/**

 * @brief   Uses the SPI polled API for small data transfers.

 * @details Polled transfers usually improve performance because it

 *          saves two context switches and interrupt servicing. Note

 *          that this option has no effect on large transfers which

 *          are always performed using DMAs/IRQs.

 */

#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__)

#define MMC_USE_SPI_POLLING         TRUE

#endif

/** @} */



/*===========================================================================*/

/**

 * @name SDC driver related setting

 * @{

 */

/*===========================================================================*/



/**

 * @brief   Number of initialization attempts before rejecting the card.

 * @note    Attempts are performed at 10mS intervals.

 */

#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)

#define SDC_INIT_RETRY              100

#endif



/**

 * @brief   Include support for MMC cards.

 * @note    MMC support is not yet implemented so this option must be kept

 *          at @p FALSE.

 */

#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)

#define SDC_MMC_SUPPORT             FALSE

#endif



/**

 * @brief   Delays insertions.

 * @details If enabled this options inserts delays into the MMC waiting

 *          routines releasing some extra CPU time for the threads with

 *          lower priority, this may slow down the driver a bit however.

 */

#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)

#define SDC_NICE_WAITING            TRUE

#endif

/** @} */



/*===========================================================================*/

/**

 * @name SERIAL driver related setting

 * @{

 */

/*===========================================================================*/



/**

 * @brief   Default bit rate.

 * @details Configuration parameter, this is the baud rate selected for the

 *          default configuration.

 */

#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)

#define SERIAL_DEFAULT_BITRATE      38400

#endif



/**

 * @brief   Serial buffers size.

 * @details Configuration parameter, you can change the depth of the queue

 *          buffers depending on the requirements of your application.

 * @note    The default is 64 bytes for both the transmission and receive

 *          buffers.

 */

#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)

#define SERIAL_BUFFERS_SIZE         16

#endif

/** @} */



/*===========================================================================*/

/**

 * @name SERIAL_USB driver related setting

 * @{

 */

/*===========================================================================*/



/**

 * @brief   Serial over USB buffers size.

 * @details Configuration parameter, the buffer size must be a multiple of

 *          the USB data endpoint maximum packet size.

 * @note    The default is 64 bytes for both the transmission and receive

 *          buffers.

 */

#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__)

#define SERIAL_USB_BUFFERS_SIZE     64

#endif

/** @} */



/*===========================================================================*/

/**

 * @name SPI driver related setting

 * @{

 */

/*===========================================================================*/



/**

 * @brief   Enables synchronous APIs.

 * @note    Disabling this option saves both code and data space.

 */

#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)

#define SPI_USE_WAIT                TRUE

#endif



/**

 * @brief   Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.

 * @note    Disabling this option saves both code and data space.

 */

#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)

#define SPI_USE_MUTUAL_EXCLUSION    TRUE

#endif

/** @} */



#endif /* _HALCONF_H_ */



/** @} */

mcuconf

Code: Select all

/*

    ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,

                 2011,2012 Giovanni Di Sirio.



    This file is part of ChibiOS/RT.



    ChibiOS/RT is free software; you can redistribute it and/or modify

    it under the terms of the GNU General Public License as published by

    the Free Software Foundation; either version 3 of the License, or

    (at your option) any later version.



    ChibiOS/RT is distributed in the hope that it will be useful,

    but WITHOUT ANY WARRANTY; without even the implied warranty of

    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

    GNU General Public License for more details.



    You should have received a copy of the GNU General Public License

    along with this program.  If not, see <http://www.gnu.org/licenses/>.

*/



/*

 * STM32F4xx drivers configuration.

 * The following settings override the default settings present in

 * the various device driver implementation headers.

 * Note that the settings for each driver only have effect if the whole

 * driver is enabled in halconf.h.

 *

 * IRQ priorities:

 * 15...0       Lowest...Highest.

 *

 * DMA priorities:

 * 0...3        Lowest...Highest.

 */



#define STM32F4xx_MCUCONF



/*

 * HAL driver system settings.

 */

#define STM32_NO_INIT                       FALSE

#define STM32_HSI_ENABLED                   TRUE

#define STM32_LSI_ENABLED                   TRUE

#define STM32_HSE_ENABLED                   TRUE

#define STM32_LSE_ENABLED                   FALSE

#define STM32_CLOCK48_REQUIRED              TRUE

#define STM32_SW                            STM32_SW_PLL

#define STM32_PLLSRC                        STM32_PLLSRC_HSE

#define STM32_PLLM_VALUE                    8

#define STM32_PLLN_VALUE                    336

#define STM32_PLLP_VALUE                    2

#define STM32_PLLQ_VALUE                    7

#define STM32_HPRE                          STM32_HPRE_DIV1

#define STM32_PPRE1                         STM32_PPRE1_DIV4

#define STM32_PPRE2                         STM32_PPRE2_DIV2

#define STM32_RTCSEL                        STM32_RTCSEL_LSI

#define STM32_RTCPRE_VALUE                  8

#define STM32_MCO1SEL                       STM32_MCO1SEL_HSI

#define STM32_MCO1PRE                       STM32_MCO1PRE_DIV1

#define STM32_MCO2SEL                       STM32_MCO2SEL_SYSCLK

#define STM32_MCO2PRE                       STM32_MCO2PRE_DIV5

#define STM32_I2SSRC                        STM32_I2SSRC_CKIN

#define STM32_PLLI2SN_VALUE                 192

#define STM32_PLLI2SR_VALUE                 5

#define STM32_VOS                           STM32_VOS_HIGH

#define STM32_PVD_ENABLE                    FALSE

#define STM32_PLS                           STM32_PLS_LEV0



/*

 * ADC driver system settings.

 */

#define STM32_ADC_ADCPRE                    ADC_CCR_ADCPRE_DIV4

#define STM32_ADC_USE_ADC1                  TRUE

#define STM32_ADC_USE_ADC2                  TRUE

#define STM32_ADC_USE_ADC3                  TRUE

#define STM32_ADC_ADC1_DMA_STREAM           STM32_DMA_STREAM_ID(2, 4)

#define STM32_ADC_ADC2_DMA_STREAM           STM32_DMA_STREAM_ID(2, 2)

#define STM32_ADC_ADC3_DMA_STREAM           STM32_DMA_STREAM_ID(2, 1)

#define STM32_ADC_ADC1_DMA_PRIORITY         2

#define STM32_ADC_ADC2_DMA_PRIORITY         2

#define STM32_ADC_ADC3_DMA_PRIORITY         2

#define STM32_ADC_IRQ_PRIORITY              6

#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     6

#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY     6

#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY     6



/*

 * CAN driver system settings.

 */

#define STM32_CAN_USE_CAN1                  FALSE

#define STM32_CAN_USE_CAN2                  FALSE

#define STM32_CAN_CAN1_IRQ_PRIORITY         11

#define STM32_CAN_CAN2_IRQ_PRIORITY         11



/*

 * EXT driver system settings.

 */

#define STM32_EXT_EXTI0_IRQ_PRIORITY        6

#define STM32_EXT_EXTI1_IRQ_PRIORITY        6

#define STM32_EXT_EXTI2_IRQ_PRIORITY        6

#define STM32_EXT_EXTI3_IRQ_PRIORITY        6

#define STM32_EXT_EXTI4_IRQ_PRIORITY        6

#define STM32_EXT_EXTI5_9_IRQ_PRIORITY      6

#define STM32_EXT_EXTI10_15_IRQ_PRIORITY    6

#define STM32_EXT_EXTI16_IRQ_PRIORITY       6

#define STM32_EXT_EXTI17_IRQ_PRIORITY       15

#define STM32_EXT_EXTI18_IRQ_PRIORITY       6

#define STM32_EXT_EXTI19_IRQ_PRIORITY       6

#define STM32_EXT_EXTI20_IRQ_PRIORITY       6

#define STM32_EXT_EXTI21_IRQ_PRIORITY       15

#define STM32_EXT_EXTI22_IRQ_PRIORITY       15



/*

 * GPT driver system settings.

 */

#define STM32_GPT_USE_TIM1                  FALSE

#define STM32_GPT_USE_TIM2                  FALSE

#define STM32_GPT_USE_TIM3                  FALSE

#define STM32_GPT_USE_TIM4                  FALSE

#define STM32_GPT_USE_TIM5                  FALSE

#define STM32_GPT_USE_TIM8                  FALSE

#define STM32_GPT_TIM1_IRQ_PRIORITY         7

#define STM32_GPT_TIM2_IRQ_PRIORITY         7

#define STM32_GPT_TIM3_IRQ_PRIORITY         7

#define STM32_GPT_TIM4_IRQ_PRIORITY         7

#define STM32_GPT_TIM5_IRQ_PRIORITY         7

#define STM32_GPT_TIM8_IRQ_PRIORITY         7



/*

 * I2C driver system settings.

 */

#define STM32_I2C_USE_I2C1                  FALSE

#define STM32_I2C_USE_I2C2                  FALSE

#define STM32_I2C_USE_I2C3                  FALSE

#define STM32_I2C_I2C1_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 0)

#define STM32_I2C_I2C1_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 6)

#define STM32_I2C_I2C2_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 2)

#define STM32_I2C_I2C2_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 7)

#define STM32_I2C_I2C3_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 2)

#define STM32_I2C_I2C3_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 4)

#define STM32_I2C_I2C1_IRQ_PRIORITY         5

#define STM32_I2C_I2C2_IRQ_PRIORITY         5

#define STM32_I2C_I2C3_IRQ_PRIORITY         5

#define STM32_I2C_I2C1_DMA_PRIORITY         3

#define STM32_I2C_I2C2_DMA_PRIORITY         3

#define STM32_I2C_I2C3_DMA_PRIORITY         3

#define STM32_I2C_I2C1_DMA_ERROR_HOOK()     chSysHalt()

#define STM32_I2C_I2C2_DMA_ERROR_HOOK()     chSysHalt()

#define STM32_I2C_I2C3_DMA_ERROR_HOOK()     chSysHalt()



/*

 * ICU driver system settings.

 */

#define STM32_ICU_USE_TIM1                  FALSE

#define STM32_ICU_USE_TIM2                  FALSE

#define STM32_ICU_USE_TIM3                  FALSE

#define STM32_ICU_USE_TIM4                  FALSE

#define STM32_ICU_USE_TIM5                  FALSE

#define STM32_ICU_USE_TIM8                  FALSE

#define STM32_ICU_TIM1_IRQ_PRIORITY         7

#define STM32_ICU_TIM2_IRQ_PRIORITY         7

#define STM32_ICU_TIM3_IRQ_PRIORITY         7

#define STM32_ICU_TIM4_IRQ_PRIORITY         7

#define STM32_ICU_TIM5_IRQ_PRIORITY         7

#define STM32_ICU_TIM8_IRQ_PRIORITY         7



/*

 * PWM driver system settings.

 */

#define STM32_PWM_USE_ADVANCED              FALSE

#define STM32_PWM_USE_TIM1                  TRUE

#define STM32_PWM_USE_TIM2                  TRUE

#define STM32_PWM_USE_TIM3                  FALSE

#define STM32_PWM_USE_TIM4                  TRUE

#define STM32_PWM_USE_TIM5                  FALSE

#define STM32_PWM_USE_TIM8                  FALSE

#define STM32_PWM_TIM1_IRQ_PRIORITY         7

#define STM32_PWM_TIM2_IRQ_PRIORITY         7

#define STM32_PWM_TIM3_IRQ_PRIORITY         7

#define STM32_PWM_TIM4_IRQ_PRIORITY         7

#define STM32_PWM_TIM5_IRQ_PRIORITY         7

#define STM32_PWM_TIM8_IRQ_PRIORITY         7



/*

 * SERIAL driver system settings.

 */

#define STM32_SERIAL_USE_USART1             FALSE

#define STM32_SERIAL_USE_USART2             FALSE

#define STM32_SERIAL_USE_USART3             FALSE

#define STM32_SERIAL_USE_UART4              FALSE

#define STM32_SERIAL_USE_UART5              FALSE

#define STM32_SERIAL_USE_USART6             FALSE

#define STM32_SERIAL_USART1_PRIORITY        12

#define STM32_SERIAL_USART2_PRIORITY        12

#define STM32_SERIAL_USART3_PRIORITY        12

#define STM32_SERIAL_UART4_PRIORITY         12

#define STM32_SERIAL_UART5_PRIORITY         12

#define STM32_SERIAL_USART6_PRIORITY        12



/*

 * SPI driver system settings.

 */

#define STM32_SPI_USE_SPI1                  FALSE

#define STM32_SPI_USE_SPI2                  TRUE

#define STM32_SPI_USE_SPI3                  FALSE

#define STM32_SPI_SPI1_RX_DMA_STREAM        STM32_DMA_STREAM_ID(2, 0)

#define STM32_SPI_SPI1_TX_DMA_STREAM        STM32_DMA_STREAM_ID(2, 3)

#define STM32_SPI_SPI2_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 3)

#define STM32_SPI_SPI2_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 4)

#define STM32_SPI_SPI3_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 0)

#define STM32_SPI_SPI3_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 7)

#define STM32_SPI_SPI1_DMA_PRIORITY         1

#define STM32_SPI_SPI2_DMA_PRIORITY         1

#define STM32_SPI_SPI3_DMA_PRIORITY         1

#define STM32_SPI_SPI1_IRQ_PRIORITY         10

#define STM32_SPI_SPI2_IRQ_PRIORITY         10

#define STM32_SPI_SPI3_IRQ_PRIORITY         10

#define STM32_SPI_DMA_ERROR_HOOK(spip)      chSysHalt()



/*

 * UART driver system settings.

 */

#define STM32_UART_USE_USART1               FALSE

#define STM32_UART_USE_USART2               TRUE

#define STM32_UART_USE_USART3               FALSE

#define STM32_UART_USE_USART6               FALSE

#define STM32_UART_USART1_RX_DMA_STREAM     STM32_DMA_STREAM_ID(2, 5)

#define STM32_UART_USART1_TX_DMA_STREAM     STM32_DMA_STREAM_ID(2, 7)

#define STM32_UART_USART2_RX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 5)

#define STM32_UART_USART2_TX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 6)

#define STM32_UART_USART3_RX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 1)

#define STM32_UART_USART3_TX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 3)

#define STM32_UART_USART6_RX_DMA_STREAM     STM32_DMA_STREAM_ID(2, 2)

#define STM32_UART_USART6_TX_DMA_STREAM     STM32_DMA_STREAM_ID(2, 7)

#define STM32_UART_USART1_IRQ_PRIORITY      12

#define STM32_UART_USART2_IRQ_PRIORITY      12

#define STM32_UART_USART3_IRQ_PRIORITY      12

#define STM32_UART_USART6_IRQ_PRIORITY      12

#define STM32_UART_USART1_DMA_PRIORITY      0

#define STM32_UART_USART2_DMA_PRIORITY      0

#define STM32_UART_USART3_DMA_PRIORITY      0

#define STM32_UART_USART6_DMA_PRIORITY      0

#define STM32_UART_DMA_ERROR_HOOK(uartp)    chSysHalt()



/*

 * USB driver system settings.

 */

#define STM32_USB_USE_OTG1                  FALSE

#define STM32_USB_USE_OTG2                  FALSE

#define STM32_USB_OTG1_IRQ_PRIORITY         14

#define STM32_USB_OTG2_IRQ_PRIORITY         14

#define STM32_USB_OTG1_RX_FIFO_SIZE         512

#define STM32_USB_OTG2_RX_FIFO_SIZE         1024

#define STM32_USB_OTG_THREAD_PRIO           LOWPRIO

#define STM32_USB_OTG_THREAD_STACK_SIZE     128

#define STM32_USB_OTGFIFO_FILL_BASEPRI      0

compiler output

Code: Select all

02:20:11 **** Incremental Build of configuration ADC for project acd ****
make all 
Compiling ../../../test/test.c
Compiling ../../../os/hal/src/hal.c
Compiling ../../../os/hal/src/adc.c
Compiling ../../../os/hal/src/can.c
Compiling ../../../os/hal/src/ext.c
Compiling ../../../os/hal/src/gpt.c
Compiling ../../../os/hal/src/i2c.c
Compiling ../../../os/hal/src/icu.c
Compiling ../../../os/hal/src/mac.c
Compiling ../../../os/hal/src/mmc_spi.c
Compiling ../../../os/hal/src/mmcsd.c
Compiling ../../../os/hal/src/pal.c
Compiling ../../../os/hal/src/pwm.c
Compiling ../../../os/hal/src/rtc.c
Compiling ../../../os/hal/src/sdc.c
Compiling ../../../os/hal/src/serial.c
Compiling ../../../os/hal/src/serial_usb.c
Compiling ../../../os/hal/src/spi.c
Compiling ../../../os/hal/src/tm.c
Compiling ../../../os/hal/src/uart.c
Compiling ../../../os/hal/src/usb.c
Compiling ../../../os/hal/platforms/STM32F4xx/stm32_dma.c
Compiling ../../../os/hal/platforms/STM32F4xx/hal_lld.c
Compiling ../../../os/hal/platforms/STM32F4xx/adc_lld.c
Compiling ../../../os/hal/platforms/STM32F4xx/ext_lld_isr.c
Compiling ../../../os/hal/platforms/STM32/can_lld.c
Compiling ../../../os/hal/platforms/STM32/ext_lld.c
Compiling ../../../os/hal/platforms/STM32/gpt_lld.c
Compiling ../../../os/hal/platforms/STM32/icu_lld.c
Compiling ../../../os/hal/platforms/STM32/mac_lld.c
Compiling ../../../os/hal/platforms/STM32/pwm_lld.c
Compiling ../../../os/hal/platforms/STM32/sdc_lld.c
Compiling ../../../os/hal/platforms/STM32/serial_lld.c
Compiling ../../../os/hal/platforms/STM32/spi_lld.c
Compiling ../../../os/hal/platforms/STM32/GPIOv2/pal_lld.c
Compiling ../../../os/hal/platforms/STM32/I2Cv1/i2c_lld.c
Compiling ../../../os/hal/platforms/STM32/OTGv1/usb_lld.c
Compiling ../../../os/hal/platforms/STM32/RTCv2/rtc_lld.c
Compiling ../../../os/hal/platforms/STM32/USARTv1/uart_lld.c
Compiling ../../../boards/ST_STM32F4_DISCOVERY/board.c
Compiling main.c
main.c: In function 'Thread1':
main.c:166:1: warning: no return statement in function returning non-void [-Wreturn-type]
main.c: In function 'main':
main.c:187:3: warning: implicit declaration of function 'sdStart' [-Wimplicit-function-declaration]
main.c:187:12: error: 'SD2' undeclared (first use in this function)
main.c:187:12: note: each undeclared identifier is reported only once for each function it appears in
make: *** [build/obj/main.o] Error 1

02:20:20 Build Finished (took 8s.363ms)

Tectu · Post by **Tectu** » Sun Apr 28, 2013 5:28 pm

And again, you have to enable the serial subsystem in the halconf.h and the corresponding drivers of the SD driver in your mcuconf.h.

~ Tectu

ChibiOS Free Embedded RTOS

voltage detection

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