GPIO_TypeDef for STM32F2

[vandyswa]

I'm bringing up ChibiOS on the Sony MN2 smartwatch, which uses the STM32F2 variant.
It looks like much of the needed support is present, but I'm looking at stm32f2xx.h and seeing
that the GPIO_TypeDef is #if 0'ed out with "CHIBIOS FIX" as the comment. The actual
def here matches some working example code from Sony, can somebody tell me why it's
been left in this state?

Thanks,
Andy Valencia

[Giovanni]

Hi,

If you use ChibiOS then you should not need that definition, there is a specific PAL driver for GPIO which also includes its own version of GPIO_TypeDef in case you need to access GPIO at registers level.

The change was required because there are differences in the various ST headers and some fields were defined in a non-optimal way. For example the BSRR register definition didn't allow for a single 32 bits access that is required if you want to implement an atomic masked write.

ST code:

Code: Select all

typedef struct
{
  __IO uint32_t MODER;    /*!< GPIO port mode register,               Address offset: 0x00      */
  __IO uint32_t OTYPER;   /*!< GPIO port output type register,        Address offset: 0x04      */
  __IO uint32_t OSPEEDR;  /*!< GPIO port output speed register,       Address offset: 0x08      */
  __IO uint32_t PUPDR;    /*!< GPIO port pull-up/pull-down register,  Address offset: 0x0C      */
  __IO uint32_t IDR;      /*!< GPIO port input data register,         Address offset: 0x10      */
  __IO uint32_t ODR;      /*!< GPIO port output data register,        Address offset: 0x14      */
  __IO uint16_t BSRRL;    /*!< GPIO port bit set/reset low register,  Address offset: 0x18      */
  __IO uint16_t BSRRH;    /*!< GPIO port bit set/reset high register, Address offset: 0x1A      */
  __IO uint32_t LCKR;     /*!< GPIO port configuration lock register, Address offset: 0x1C      */
  __IO uint32_t AFR[2];   /*!< GPIO alternate function registers,     Address offset: 0x24-0x28 */
} GPIO_TypeDef;

New code:

Code: Select all

typedef struct {
  volatile uint32_t     MODER;
  volatile uint32_t     OTYPER;
  volatile uint32_t     OSPEEDR;
  volatile uint32_t     PUPDR;
  volatile uint32_t     IDR;
  volatile uint32_t     ODR;
  volatile union {
    uint32_t            W;
    struct {
      uint16_t          set;
      uint16_t          clear;
    } H;
  } BSRR;
  volatile uint32_t     LCKR;
  volatile uint32_t     AFRL;
  volatile uint32_t     AFRH;
} GPIO_TypeDef;

Giovanni

[vandyswa]

Cool! Thanks for the info, I will go with your updated approach and convert as needed.

Andy