What compiler/version are you using? is FP enabled in your application?
Giovanni
low-level TIM conflict with Chibio?
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- Giovanni
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Re: low-level TIM conflict with Chibio?
I am using latest codesourcery - that's GCC 4.8.x. Yes I use floating point, and most of my logic (and stack usage) in in the interrupt handlers.
While I would probably need to increase even the proposed larger defaults, I still believe the current extremely low defaults are not perfect, they are probably causing issues for too many unsuspecting naive users.
While I would probably need to increase even the proposed larger defaults, I still believe the current extremely low defaults are not perfect, they are probably causing issues for too many unsuspecting naive users.
Re: low-level TIM conflict with Chibio?
Probably not related to Chibi at all, here's another issue I am having with the same code:
I am not getting an interrupt in case of small auto-reload register value:
So, everything works as a charm if timeUs is 300 and above - that's 300us between timer restart and the callback. But if I try values like 5 or 11 - the callback never happens. Just for clarity: I am not even trying to constantly invoke 5us, 5us, 5us, 5us - even a single 5us after numerous 300us invocations fails to produce a callback.
Currently I am trying relatively low #define HW_TIMER_PRIORITY 12 but I was still expecting the callback to happen eventually?
Please advice how can I get the callback to happen, even if it would be a bit late.
I am not getting an interrupt in case of small auto-reload register value:
Code: Select all
void initMicrosecondTimer(void) {
RCC ->APB1ENR |= RCC_APB1ENR_TIM5EN; // Enable TIM5 clock
nvicEnableVector(HW_TIMER_IRQ, CORTEX_PRIORITY_MASK(HW_TIMER_PRIORITY));
TIM->DIER |= TIM_DIER_UIE; // Enable interrupt on update event
TIM->CR1 |= TIM_CR1_OPM; // one pulse mode: count down ARR and stop
TIM->CR1 &= ~TIM_CR1_ARPE; /* ARR register is NOT buffered, allows to update timer's period on-fly. */
TIM->PSC = 84 - 1; // 168MHz / 2 / 84 = 1MHz, each tick is a microsecond
}
/**
* sets the alarm to the specified number of microseconds from now.
* This function should be invoked under kernel lock which would disable interrupts.
*/
void setHardwareUsTimer(int timeUs) {
TIM->ARR = timeUs - 1;
TIM->EGR |= TIM_EGR_UG; // generate an update event to reload timer's counter value
TIM->CR1 |= TIM_CR1_CEN; // restart timer
lastSetTimerTime = getTimeNowUs();
isTimerPending = TRUE;
timerRestartCounter++;
}
So, everything works as a charm if timeUs is 300 and above - that's 300us between timer restart and the callback. But if I try values like 5 or 11 - the callback never happens. Just for clarity: I am not even trying to constantly invoke 5us, 5us, 5us, 5us - even a single 5us after numerous 300us invocations fails to produce a callback.
Currently I am trying relatively low #define HW_TIMER_PRIORITY 12 but I was still expecting the callback to happen eventually?
Please advice how can I get the callback to happen, even if it would be a bit late.
- Giovanni
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- Joined: Wed May 27, 2009 8:48 am
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Re: low-level TIM conflict with Chibio?
What are you trying to do? it looks something like the GPT driver.
Giovanni
Giovanni
Re: low-level TIM conflict with Chibio?
I've migrated my code to gptStartOneShot and things are looking up.
Only one question: 'interval period in ticks'
Is it supposed to work as "gptStartOneShotI(&GPTDEVICE, 1);" - i.e. with interval = 1? Because it does not work for me like that - the callback never happens. Works with any other parameter.
I know that the implementation is
but one tick seems to be a valid parameter, is not it?
Only one question: 'interval period in ticks'
Is it supposed to work as "gptStartOneShotI(&GPTDEVICE, 1);" - i.e. with interval = 1? Because it does not work for me like that - the callback never happens. Works with any other parameter.
I know that the implementation is
Code: Select all
gptp->tim->ARR = (uint32_t)(interval - 1); /* Time constant. */
but one tick seems to be a valid parameter, is not it?
- Giovanni
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