Is there a #define or other platform-independent method of getting the size of a cache line? Would be useful in writing platform-independent code (and, if set to zero, indicates that caching isn't supported at all).
It could also be useful to have a function which indicates whether a specific memory area is cached.
STM32F7 cache line size
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Giovanni
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Re: STM32F7 cache line size
Hi,
It should be something done in CMSIS, there is a field in the SCB_CCSIDR register but it is a runtime information.
I think it is fixed in the CM7 anyway, should verify on the manual.
Giovanni
It should be something done in CMSIS, there is a field in the SCB_CCSIDR register but it is a runtime information.
I think it is fixed in the CM7 anyway, should verify on the manual.
Giovanni