Hello,
I can't explain the behavior of the following code, compiled on STM32F105 with Chibios 16.1.8:
for (uint32_t i = 0; i < size; ++i) {
sdWrite(DRV, &data[i], 1);
osDelay(time);
}
Send data on the serial line, there should be a pause between each byte - time in ms
When I observe the transmission with oscilloscope, I see that the pause is exactly (time - 1) ms. If time == 1 -> no delay between the bytes, if time == 2, then there is exactly 1 ms between the end of the stop bit and the start bit of the next byte.
I tried to play with osDelay(..) and simple GPIO change - everything on the line as expected - no -1 shift
osDelay(x) behaviour
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Re: osDelay(x) behaviour
Hi,
Probably this is because sdWrite() takes more than 1mS when the queue is full, consider the transmission time.
Giovanni
Probably this is because sdWrite() takes more than 1mS when the queue is full, consider the transmission time.
Giovanni
Re: osDelay(x) behaviour
Thanks!
At my baud rate the transmission time is almost exactly 1ms per byte. I incorrectly assumed that sdWrite blocks until all has completed. But it blocks until the data byte goes in the transmission register TDR.
At my baud rate the transmission time is almost exactly 1ms per byte. I incorrectly assumed that sdWrite blocks until all has completed. But it blocks until the data byte goes in the transmission register TDR.