EEPROM on STM32L0X family

[steved]

I've had a look to see if there's already support for the on-chip EEPROM in the 32L0x series, without success - is it a 'TODO'?

It looks as if the read side can be handled by adding the EEPROM area into the scatter file (On the 32L0x series, at least, always starts at 0x0808000).

At the lowest level the write side is pretty much the examples in the manual.

At the next level have a layer to manage block reads and writes, compatible with the drivers for external EEPROM.

If there's nothing already in place, I might have a go at this.

[Giovanni]

Potentially everything is a TODO. Updating scatter files would be nice.

Giovanni

[steved]

This proved to be a bit more involved than I expected, especially since I only wanted one bit of non-volatile storage at the time! Still, my requirements have escalated to 10 time that since.

The attached project includes an EEPROM-writing library, test harness and updated scatter file for the 32L031, to run on a Nucleo32-STM32L031K6T6.

ATM I've allocated flash7 to EEPROM; maybe it should have a different name. The scatter file needs checking, since I've never done one before (and, like makefiles, it gave me a headache).

I suggest that Chibios core HAL includes just the basic EEPROM-writing primitives (byte, word, long word) and the related helper functions. They should provide a good basis for a generic interface.

I've included a generic block write routine which will be over-complex for some applications (it handles all combinations of variable alignment), but can be stripped down to suit individual applications.

[steved]

Fixed a bug in the block write routine (and got rid of some compiler warnings)

[Giovanni]

Hi,

Moved in "bug reports" in order to not lose this in the noise of the support forum.

Giovanni