Synchronization ADC and center-aligned PWM STM32F405

[ecodev]

Hello everyone!
I am developing an application to control a 3-phase motor by means of center-aligned PWM. In order to obtain the best measurements, I need to sample the ADC channels when all 3 PWM outputs are ON and/or OFF at the same time. This should happen at the peak of the counter (ARR) and at 0. Nevertheless I am having problems trying to synchronize the ADC to be triggered at the proper times. I have taken bits and examples from many websites and the documentation, since it seems difficult to find comprehensive examples with the latest versions of Chibi.

What is working right now:

• TIM1 is used for center-aligned PWM @ 20 kHz (oscilloscope says 21 kHz tho), 3 complementary channels with tiny dead-times.
• ADC triggered by TIM2 @ 20 kHz, asynchronous conversion, 6 channels, 12-bit, 15 cycles each.

PWM is working as it is supposed to and the ADC samples all channels in order and stores data in the buffer. However, if I check the states of the PWM outputs in the ADC EoC callback (or in the TIM2 callback), I get some channels ON and some OFF, rather than all in the same state, which I'd expect to be OFF as they have the same frequency.

What I have tried without success:

• Set TIM2 to 40 kHz to trigger ADC twice per period, but same scenario.
• Set TIM2 to start at the same time as TIM1 so the counters are synchronized. Following the indications of the reference manual. I call pwmStart() and gptStart with the configuration first and then I manipulate the registers. I trigger manually TIF1 by code in the main thread. Same as before, sometimes I get the ADC to sample at the right time, but not always.
• Use PWM end-of-period callback and also use the remaining channel with a duty cycle of 99% to trigger a callback. Same results, can't get the right values all the time.
• Use injected channels triggering with TIM1, although I think this does not fit my case since I have 6 channels. It did not work either.

Are these approaches wrong? Is there an easier method of achieving what I am trying to do? I have tried to find examples of this on the internet but I did not find anything.

Thanks.

[Giovanni]

Hi,

Not sure, I think you should first find if the F405 is actually able to do what you need then see how to implement it using ChibiOS. I am not sure it is even possible to start 2 timers in an atomic way (I know this is possible using the HRTIM on the G474).

Giovanni

[ecodev]

According to the reference manual of the STM32F4 (RM0090) in page 625 they provide the configuration in the registers of TIM1 and TIM2 that would allow to make both timers start counting at the very same time.

[Giovanni]

Hi,

The best approach would be to initialize the timers at register levels, the HAL drivers are not meant to be able to cover all possible configurations. You may still use the RCC macros to initialize clocks. The ADC triggering is encoded in the ADCConversionGroup structure, that is demonstrated in the HAL ADC demos, make sure to select the right trigger source.

Giovanni

[ecodev]

Yes, the triggering was inspired by the demos and some tutorials and it works fine. The problem is that is not triggered when it should be.

[ecodev]

Went back to a more low-level approach and still can't synchronize the ADC properly.
I tried using the update interrupt of TIM1 (center-aligned PWM) to modify the CNT register of TIM2 so it overflows at the same time as TIM1, but that did not work. Actually, looking at variables in debug with a breakpoint in the end-of-period interrupt of TIM1, CNT register values don't make sense to me. I would expect them to be quite low, but I have seen both high and low values in a random manner. Then, with a breakpoint in the following line after modifying the CNT register, the values for TIM1 and TIM2 are quite different, even taking into account the different clock frequencies.

I also tried initializing the timers and then disabling them, setting the CNTs to 0 and re-enabling them so they are (approximately) synchronized, but that did not work either. I didn't have a lot of faith in this approach but I am running out of ideas...

[Giovanni]

Hi,

If you use interrupts you should consider that IRQs have a significant jitter because critical sections in the application code and other IRQs.

Giovanni

[ecodev]

Yes, I count on that, that's why I wanted the ADC to be triggered from a TIM rather than an ISR. But if I set the CNT registers to be equal and the internal clocks are synchronized, how come they are so far apart in such a short period? I just tried with both TIM having the same CLK and they still drift apart.

[Giovanni]

Is the ARR register value the same for both? also, do the timer have the same input clock? (both on APB1 or both on APB2).

Giovanni

[ecodev]

Yes, I tested with same ARR and clock source.
I know probably the best way is to use the remaining channel of PWM1 to trigger the conversion of ADC1 so it falls approximately when all PWM outputs are OFF (end of the down-counting part), but I haven't been able to set that configuration up. I think it is not possible to use it unless is for injected channels, and I don't have enough of those.

EDIT: If I use the remaining channels of PWM1 (channel 4 as output compare, no output, CCR4=10) to trigger the ADC (detection at falling edges of channel 4, TIM1 capture compare 4 event, discontinuous mode), conversions happen but the results do not look right.