I am using the current stable 21.11.4 branch. In the ADCv3 driver file hal_adc_lld.c, there seems to be a copy-paste error regarding the clock mask (clkmask) for ADC5.
It appears that the bit shift corresponds to the ADC index (ADC3=bit2, ADC4=bit3, ADC5=bit4), but for ADC5, the code sets and resets bit 3 (which belongs to ADC4).
Here are the suspicious lines:
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775 #if STM32_ADC_USE_ADC5
776 if (&ADCD5 == adcp) {
777 adcp->dmastp = dmaStreamAllocI(STM32_ADC_ADC5_DMA_STREAM,
778 STM32_ADC_ADC5_DMA_IRQ_PRIORITY,
779 (stm32_dmaisr_t)adc_lld_serve_dma_interrupt,
780 (void *)adcp);
781 osalDbgAssert(adcp->dmastp != NULL, "unable to allocate stream");
782
783 clkmask |= (1 << 3); // >>> Should be (1 << 4)
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865 #if STM32_ADC_USE_ADC5
866 if (&ADCD5 == adcp) {
867 clkmask &= ~(1 << 3); // >>> Should be ~(1 << 4)
868 }
#endif
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904 #if STM32_HAS_ADC3 || STM32_HAS_ADC4 || STM32_HAS_ADC5
905 if ((clkmask & 0xC) == 0) { // >>> Should be (0x1C) to include bit 4
906 rccDisableADC345();
907 }
#endif
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775 #if STM32_ADC_USE_ADC5
776 if (&ADCD5 == adcp) {
// Missing:
// osalDbgAssert(STM32_ADC5_CLOCK <= STM32_ADCCLK_MAX, "invalid clock frequency");