STM32H743 QUADSPI1: Strange amplitude modulation on QSPI_CLK and low amplitude issues

[Alex]

Hi everyone,
I'm experiencing a strange behavior with the QUADSPI1 peripheral on a custom STM32H743VIT6 board (4-layer PCB, solid GND and VDD planes).The setup:MCU: STM32H743VIT6 ($VOS1$ confirmed, V_CAP = 1.22v OS: ChibiOS (behavior differs between versions).Peripheral: QUADSPI1 connected to a W25Qxx Flash.Clock Source: PLL2_R (stable).Prescaler: 8.GPIO Config: OSPEED_VERYHIGH, Alternate Function 9.The Symptoms:Amplitude Modulation: On a recent ChibiOS version, I observed a periodic amplitude modulation on the QSPI_CLK pin (captured via oscilloscope). It looks like a "stepped" envelope where one packet has a higher amplitude than the next.Low Amplitude: After switching to an older ChibiOS branch, the modulation disappeared, but the QSPI_CLK amplitude is stuck at ~1.8v, even though VDD is 3.3v and the pin is not heavily loaded (tested even on a floating PF10 pin).

Observations:
SDRAM (FMC) is initialized on the same board, runs at 100MHz, and works perfectly.
Disabling SDRAM does not affect the QSPI signal behavior.
The issue persists across different physical boards of the same design.

[Alex]

"I'm seeing persistent bit-level corruption in my read/write tests. A simple XOR check shows a constant pattern (e.g., 0x44), likely caused by the flash chip missing clock cycles at this reduced amplitude."

[Giovanni]

Hi,

This could be board-related, verify if PWR settings are the same in the 2 ChibiOS versions, it could be something related to the SMPS initialization.

Giovanni