STM32 ADC kickstart example

[Rick Burnett]

ADC question:

If I understand correctly, there are multiple ADC in the STM32F4xx. How do you control which ADC an input goes to, with the conversion group sequence?

Also, if you are sampling at different rates, does the callback get called based on the fastest sample rate you've used and so those values not being sampled at that speed will just be the same value as before?

[Tectu]

The STM32F4xx comes with two or three ADCs. You select which ADC you want to use by choosing the corresponding ADC driver in your adcStart() routine (it's the first parameter).

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adcStart(&ADCD1, &adccfg);
adcStart(&ADCD2, &adccfg);

Remember that you have to enable each ADC in your mcuconf.h.

I am not sure if I understand the callback question correctly. The callback is called whenever a conversion is completed. It dosen't fire at a constand time base, therefore this dosen't matter.

I hope this helps somehow.

~ Tectu

[Giovanni]

Hi,

It is the conversion group that defines how a conversion is performed and which inputs are involved, it is all defined there. The callback is called when the conversion is half complete and when it is complete, rates have no impact on callbacks.

I recommend reading the ADC section of the RM manual, the group configuration is very close to the registers definitions.

Edit: Tectu was first on this one

Giovanni

[Rick Burnett]

On the ADC selection part, makes perfect sense how to call the different ADCs, thanks!

Pertaining to the callback, what I don't understand is the sample rate then, which may mean I am using the sample rate incorrectly. With the way things are defined, I can specify different sample rates for the channels being checked under a group. Does this mean that the half-point gets called when the slowest sample rate is done capturing half the data and so the faster rates just sample really quickly but then are not sampled consistently in terms of time between samples.

Ie, hypothetically speaking if one is set to sample every 3 cycles and another 128 cycles in the same ADC channel, After 9 cycles the first one would be done, but the 128 cycle rate wouldn't have even sampled once yet?

To me it would seem the best thing to do would be have the same samplerate on everything on one ADC.

[Giovanni]

The half point as number of repeated sequences.

For example, if you sample 6 channels 20 times (N) the half point callbacks is called after sampling the 6 channels 10 times (buffer half full), the final callback is called at the end.

Note that the half callback is called only for N > 1.

Giovanni

[Rick Burnett]

I understand that part, what I don't understand is if you select different sampling rates on the same group for different channels. If you are sampling every 3 cycles for on IN and say 192 cycles for another input, and they all go into the same buffer, how does that work?

[Giovanni]

Note that the conversions in a group are performed sequentially, it is not a parallel process so the sampling time only affects the total group conversion time, not the sequence of operations.
In the buffer there is one location for each sample regardless the sampling time, if you sample 4 channels A, b, C and D six times you have a matrix:

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00 - A B C D
04 - A B C D
08 - A B C D <- half callback
12 - A B C D
16 - A B C D
20 - A B C D <- full callback

Giovanni

[Rick Burnett]

Oh!! Now i understand.

Okay, so that really changes how to use the ADC values. Overall, my sampling rate of ANY channel is dependent on ALL the sampling I am doing on that ADC. And I guess the longer the sampling time I pick for each channel, the more accurate the value would be.

This means I should definitely move my more critical ADC operations to their own ADC channel.

Also, is a 'cycle time' the same as a tick?

[Giovanni]

You should read the RM about sampling times, the required sampling time is a function of the impedance driving the analog input. Cycles are the the ADC clock cycles.

Giovanni