STM32F4 ADC configuration

[Faisal Mehmood]

guys i have picked up project at university for which i need to learn this discovery board real fast so i will be asking you people a lot of questions so bear with me

another question for demo code of stm32f4discovery:

in adc configuration group, ADC_CR1 has been initialized to zero...

ADC_CR1 also includes the bit that enables EOC interrupt

so won't the EOC interrupt be disabled by initializing ADC_CR1 with 0?

[Tectu]

The following answer is just out of my mind and not based on anything I would describe as knowledge:
Why do you want to use the EOC interrupt manually? The RTOS does abstract everything for you. Just use the callback. This works even when CR1 = 0.

It might be that I am completely wrong here - It's just how I always used it.


~ Tectu

[Faisal Mehmood]

Cool.. I thought if the EOC bit was needed for callback too

Thanx

[Tectu]

You should really take a look at all the demo codes, the testhal and the other thread. All of these codes how the CR1 register set to 0 and all of them are supposed to work


~ Tectu

[Faisal Mehmood]

(ADC_SAMPLE_56) sets the sampling rate of an adc channel to 56 cycles..

56 cycles of which clock??? the explanation in reference manual is too hazy

I read on the same forum that (ADC_CCR_ADCPRE_DIV4) in mcuconfig file is also determines the clock

Please clearify

[Tectu]

Please read all the related documentation. I don't know how this can be «hazy»?

The ADC samples the input voltage for a number of ADCCLK cycles that can be modified
using the SMP[2:0] bits in the ADC_SMPR1 and ADC_SMPR2 registers. Each channel can
be sampled with a different sampling time.
The total conversion time is calculated as follows:
Tconv = Sampling time + 12 cycles

It's the ADCCLK clock.

The STM32_ADC_ADCPRE macro in your mcuconf.h defines the prescaler for that clock.


~ Tectu

[Giovanni]

Hi,

Note that some *required* bits in the control registers are enforced by the drivers even if not specified in the configuration structure. The best approach is to follow the demos.

Giovanni.

[lmamakos]

Please read all the related documentation. I don't know how this can be «hazy»?
[...]
It's the ADCCLK clock.

The STM32_ADC_ADCPRE macro in your mcuconf.h defines the prescaler for that clock.

You'll also want to make sure you look very closely at the diagram in the relevant reference manual that shows the clock tree, and how the various frequencies for clocks driving the various peripherals are derived. This also helped me make sense of some of the ChibiOS clock configuration options.

[iman]

Hi,

I want to use ADC but I can't understand adc configuration well, for example whats the usage of ADC_GRP1_NUM_CHANNELS ?

I want to measure only one signal by ADC in dual mode. I want some description on these lines:

Code: Select all

#define ADC_GRP1_NUM_CHANNELS   2
#define ADC_GRP1_BUF_DEPTH      8

#define ADC_GRP2_NUM_CHANNELS   8
#define ADC_GRP2_BUF_DEPTH      16

static adcsample_t samples1[ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH];
static adcsample_t samples2[ADC_GRP2_NUM_CHANNELS * ADC_GRP2_BUF_DEPTH];
//uint8_t iman=100;
/*
 * ADC streaming callback.
 */
size_t nx = 0, ny = 0;
static void adccallback(ADCDriver *adcp, adcsample_t *buffer, size_t n) {

  (void)adcp;
  if (samples2 == buffer) {
    nx += n;
  }
  else {
    ny += n;
  }
}

static void adcerrorcallback(ADCDriver *adcp, adcerror_t err) {

  (void)adcp;
  (void)err;
}

/*
 * ADC conversion group.
 * Mode:        Linear buffer, 8 samples of 2 channels, SW triggered.
 * Channels:    IN7, IN8.
 */
static const ADCConversionGroup adcgrpcfg1 = {
  FALSE,
  ADC_GRP1_NUM_CHANNELS,
  NULL,
  adcerrorcallback,
  0,                                                            /* CFGR     */
  ADC_TR(0, 4095),                                              /* TR1      */
  ADC_CCR_DUAL(1),                                              /* CCR      */
  {                                                             /* SMPR[2]  */
    0,
    0
  },
  {                                                             /* SQR[4]   */
    ADC_SQR1_SQ1_N(ADC_CHANNEL_IN7) | ADC_SQR1_SQ2_N(ADC_CHANNEL_IN8),
    0,
    0,
    0
  },
  {                                                             /* SSMPR[2] */
    0,
    0
  },
  {                                                             /* SSQR[4]  */
    ADC_SQR1_SQ1_N(ADC_CHANNEL_IN8) | ADC_SQR1_SQ2_N(ADC_CHANNEL_IN7),
    0,
    0,
    0
  }
};

/*
 * ADC conversion group.
 * Mode:        Continuous, 16 samples of 8 channels, SW triggered.
 * Channels:    IN7, IN8, IN7, IN8, IN7, IN8, Sensor, VBat/2.
 */
static const ADCConversionGroup adcgrpcfg2 = {
  TRUE,
  ADC_GRP2_NUM_CHANNELS,
  adccallback,
  adcerrorcallback,
  0,                                                            /* CFGR     */
  ADC_TR(0, 4095),                                              /* TR1      */
  ADC_CCR_DUAL(1) | ADC_CCR_TSEN | ADC_CCR_VBATEN,              /* CCR      */
  {                                                             /* SMPR[2]  */
    ADC_SMPR1_SMP_AN7(ADC_SMPR_SMP_19P5)
    | ADC_SMPR1_SMP_AN8(ADC_SMPR_SMP_19P5),
    ADC_SMPR2_SMP_AN16(ADC_SMPR_SMP_61P5)
    | ADC_SMPR2_SMP_AN17(ADC_SMPR_SMP_61P5),
  },
  {                                                             /* SQR[4]   */
    ADC_SQR1_SQ1_N(ADC_CHANNEL_IN7)  | ADC_SQR1_SQ2_N(ADC_CHANNEL_IN8) |
    ADC_SQR1_SQ3_N(ADC_CHANNEL_IN7)  | ADC_SQR1_SQ4_N(ADC_CHANNEL_IN8),
    ADC_SQR2_SQ5_N(ADC_CHANNEL_IN7)  | ADC_SQR2_SQ6_N(ADC_CHANNEL_IN8) |
    ADC_SQR2_SQ7_N(ADC_CHANNEL_IN16) | ADC_SQR2_SQ8_N(ADC_CHANNEL_IN17),
    0,
    0
  },
  {                                                             /* SSMPR[2] */
    ADC_SMPR1_SMP_AN7(ADC_SMPR_SMP_19P5)
    | ADC_SMPR1_SMP_AN8(ADC_SMPR_SMP_19P5),
    ADC_SMPR2_SMP_AN16(ADC_SMPR_SMP_61P5)
    | ADC_SMPR2_SMP_AN17(ADC_SMPR_SMP_61P5),
  },
  {                                                             /* SSQR[4]  */
    ADC_SQR1_SQ1_N(ADC_CHANNEL_IN8)  | ADC_SQR1_SQ2_N(ADC_CHANNEL_IN7) |
    ADC_SQR1_SQ3_N(ADC_CHANNEL_IN8)  | ADC_SQR1_SQ4_N(ADC_CHANNEL_IN7),
    ADC_SQR2_SQ5_N(ADC_CHANNEL_IN8)  | ADC_SQR2_SQ6_N(ADC_CHANNEL_IN7) |
    ADC_SQR2_SQ7_N(ADC_CHANNEL_IN17) | ADC_SQR2_SQ8_N(ADC_CHANNEL_IN16),
    0,
    0
  }
};

Thanks

[Giovanni]

Hi,

I assume you are using an STM32F3xx because the dual mode.

ADC_GRP1_NUM_CHANNELS is the number of channels in the conversion group 1 (IN7 and IN8 in that example).

Giovanni