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Re: I2C Bus error handling

Posted: Tue Nov 27, 2012 6:12 pm
by nosense
Ok just a little update: Error is still there, but occurs only on SDA line glitches. SCL is error prone.

To reproduce error:
1) Perform continuous communication with I2C slave in loop.
2) Toggle SDA line to ground externally.
3) In around 10% cases the MCU gets stuck in I2C1_EV_IRQHandler interrupt handler.
4) Safety timeout is set to 100 ms, but doesn't work.

Environment: STM32F100 low density and ChibiOs 2.4.2 + 10DOF board

This error should be very rare so I will probably rely on watchdog to recover from this state. But I think it is important to know that it might happen. I spent more than 5 hours trying to resolve this issue with no success. Maybe someone with deeper understanding of inner structure of the driver can be more successful.

Re: I2C Bus error handling

Posted: Sat Dec 29, 2012 1:21 pm
by trunet
a bulletproof I2C will be great. did you have any news on this?

Re: I2C Bus error handling

Posted: Thu Jan 03, 2013 2:27 pm
by dandys
nosense wrote:Ok just a little update: Error is still there, but occurs only on SDA line glitches. SCL is error prone.

To reproduce error:
1) Perform continuous communication with I2C slave in loop.
2) Toggle SDA line to ground externally.
3) In around 10% cases the MCU gets stuck in I2C1_EV_IRQHandler interrupt handler.
4) Safety timeout is set to 100 ms, but doesn't work.

Environment: STM32F100 low density and ChibiOs 2.4.2 + 10DOF board

This error should be very rare so I will probably rely on watchdog to recover from this state. But I think it is important to know that it might happen. I spent more than 5 hours trying to resolve this issue with no success. Maybe someone with deeper understanding of inner structure of the driver can be more successful.


Ahoj!
I also have a project, in which when I2C communication fails, it can hit the ground and kill thousand of innocent people :-). Now I've got quite nervous about I2C when reading this thread, because it's already flying :-) I remember, I observed quite similar behaviour (lock in I2C ISR) few months ago in early stage of development when writing driver for MS5611 - when I was reading out data in too fast update intervals (pretty out of datasheet range) - it was my fault, but it definitely shouldn't end up in locked state (SDA and SCL was released too). It could be the same problem. Someobody should really try to do something about it. If noone, I could probably give it a try in next week . I know I2C cell in STM32F1 is piece of crap, but I hope there is some SW solution to this.

Re: I2C Bus error handling

Posted: Thu Jan 03, 2013 2:35 pm
by Giovanni
Hi,

The HW is crap, hopefully the I2C in F0 and F3 is better.

I am looking in a SW I2C implementation for the STM32F1, it might be not elegant but, at least, safer. It will be API compatible so you will be able to use the new implementation almost transparently.

Anyway if you want to try improvements get in touch with barthess who made most of the current driver and has a deeper experience with it.

Giovanni