STM32_SDMMC_MAXCLK is not set in hal_lld_type1.h or hal_lld_type2.h and so defaults to 50Mhz which is way too low.
I suspect the values defined in hal_lld_type3.h are applicable to type1 and type2 as well
Wrong checks on STM32_SDMMC_MAXCLK for H7 type1 lld Topic is solved
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nikiwaibel
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Re: Wrong checks on STM32_SDMMC_MAXCLK for H7 type1 lld
for the STM32H7A3, the maximum is 280Mhz in VOS0.
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Giovanni
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